STA013 View Datasheet(PDF) - STMicroelectronics
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STA013 Datasheet PDF : 38 Pages
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STA013 - STA013B - STA013T
Figure 7. PLL and Clocks Generation System
XTI
N
PFD
CP
R
C
C
M
VCO
Switching
FRAC
Circuit
Update FRAC
Disable PLL
X
XT I2OCLK
S
XT I2DSPCLK
OCLK
DCLK
2.4 - PCM Output Interface
The decoded audio data are output in serial PCM
format. The interface consists of the following sig-
nals:
SDO
PCM Serial Data Output
SCKT
PCM Serial Clock Output
LRCLK Left/Right Channel Selection Clock
The output samples precision is selectable from
Figure 8. PCM Output Formats
16 to 24 bits/word, by setting the output precision
with PCMCONF (16, 18, 20 and 24 bits mode)
register. Data can be output either with the most
significant bit first (MS) or least significant bit first
(LS), selected by writing into a flag of the
PCMCONF register.
Figure 8 gives a description of the several
STA013 PCM Output Formats.
The sample rates set decoded by STA013 is de-
scribed in Table 1.
LRCKT
16 SCLK Cycles
16 SCLK Cycles
16 SCLK Cycles
16 SCLK Cycles
16 SCLK Cycles
SDO
M
S
SDO
L
S
LM
SS
ML
SS
LM
SS
ML
SS
LM
SS
ML
SS
L PCM_ORD = 0
S PCM_PREC is 16 bit mode
M PCM_ORD = 1
S PCM_PREC is 16 bit mode
LRCKT
SDO
SDO
SDO
SDO
32 SCLK Cycles
32 SCLK Cycles
32 SCLK Cycles
32 SCLK Cycles
32 SCLK Cycles
M
S
L
S
0
M
S
L
S
0
M
S
L0
S
M
S
L0
S
PCM_FORMAT = 1
PCM_DIFF = 1
0M
S
L
S
0
M
S
L
S
0M
S
L
0
M
S
S
L PCM_FORMAT = 0
S PCM_DIFF = 0
0M
S
L 0 0M
S
S
L
S
0
0M
S
L
S
0
0M
S
L
S
0
PCM_FORMAT = 0
PCM_DIFF = 1
MSB
M
S
L
S
MSB
M
S
L
S
M
MSB S
L
S
MSB
M
S
L PCM_FORMAT = 1
S PCM_DIFF = 1
Table 1: MPEG Sampling Rates (KHz)
MPEG 1
48
44.1
32
MPEG 2
24
22.05
16
MPEG 2.5
12
11.025
8
8/38
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