ST14C02C-S42 View Datasheet(PDF) - STMicroelectronics

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ST14C02C-S42

Memory Card IC 2 Kbit (256 x 8) Serial I2C Bus EEPROM

STMicroelectronics 

ST14C02C

Figure 9. Read Mode Sequences

CURRENT

ADDRESS

READ

ACK

NO ACK

DEV SEL

DATA OUT

R/W

RANDOM

ADDRESS

READ

ACK

ACK

ACK

NO ACK

DEV SEL *

BYTE ADDR

DEV SEL *

DATA OUT

R/W

R/W

SEQUENTIAL

CURRENT

READ

SEQUENTIAL

RANDOM

READ

ACK

ACK

DEV SEL

DATA OUT 1

R/W

ACK

NO ACK

DATA OUT N

ACK

ACK

ACK

ACK

DEV SEL *

BYTE ADDR

DEV SEL *

DATA OUT 1

R/W

R/W

ACK

NO ACK

DATA OUT N

AI01942

Sequential Read

This mode can be initiated with either a Current

Address Read or a Random Address Read. How-

ever, in this case the master does acknowledge

the data byte output, and the memory continues to

output the next byte in sequence. To terminate the

stream of bytes, the master must not acknowledge

the last byte output, and must generate a STOP

condition. The output data comes from consecu-

tive byte addresses, with the internal byte address

counter automatically incremented after each byte

output. After the last memory address, the address

counter will ‘roll-over’ and the memory will contin-

ue to output data from the start of the memory

block.

Acknowledge in Read Mode

In all read modes the memory waits for an ac-

knowledgment during the 9th bit time. If the master

does not pull the SDA line low during this time, the

memory device terminates the data transfer and

switches to its standby state.

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