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PM8313 View Datasheet(PDF) - PMC-Sierra

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PM8313
PMC-Sierra
PMC-Sierra PMC-Sierra
PM8313 Datasheet PDF : 192 Pages
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DATA SHEET
PMC-920702
ISSUE 5
PM8313 D3MX
M13 MULTIPLEXER
generated and inserted by the timing circuitry. Software control is provided to
transmit DS2 AIS and DS2 payload loopback requests. The loopback request is
coded by inverting one of the three C-bits (the default option is compatible with
ANSI T1.107a Section 8.2.1 and TR-TSY-000009 Section 3.7). The TSB also
supports generation of a C-bit Parity formatted DS3 stream by providing a
generated DS2 rate clock (GD2CLK) corresponding to a 100% stuffing ratio.
Integrated M13 applications are supported by providing a generated DS2 rate
clock corresponding to a 39.1% stuffing ratio.
When demultiplexing seven DS2 streams from an M23 formatted DS3, the MX23
performs bit destuffing via interpretation of the C-bits. The MX23 also detects
and indicates DS2 payload loopback requests encoded in the C-bits. As per
ANSI T1.107a Section 8.2.1 and TR-TSY-000009 Section 3.7, the loopback
command is identified as C3 being the inverse of C1 and C2. Because TR-TSY-
000233 Section 5.3.14.1 recommends compatibility with non-compliant existing
equipment, the two other loopback command possibilities are also supported. As
per TR-TSY-000009 Section 3.7, the loopback request must be present for five
successive M-frames before declaration of detection. Removal of the loopback
request is declared when it has been absent for five successive M-frames.
DS2 payload loopback can be activated or deactivated under software control.
During payload loopback the DS2 stream being looped back still continues
unaffected in the demultiplex direction to the DS2 Framer. All seven
demultiplexed DS2 streams can also be replaced with AIS on an individual basis.
8.9 DS2 Framer
The FRMR DS2 Framer integrates circuitry required for framing to a DS2 bit
stream and is directly compatible with the M12 DS2 application. The FRMR can
also be configured to frame to a G.747 bit stream.
The DS2 FRMR frames to a DS2 signal with a maximum average reframe time of
less than 7 ms and frames to a G.747 signal with a maximum average reframe
time of 1 ms. In DS2 mode, both the F-bits and M-bits must be correct for a
significant period of time before frame alignment is declared. In G.747 mode,
frame alignment is declared if the candidate frame alignment signal has been
correct for 3 consecutive frames (in accordance with CCITT Rec. G.747 Section
4). Once in frame, the DS2 FRMR provides indications of the M-frame and M-
subframe boundaries, and identifies the overhead bit positions in the incoming
DS2 signal or provides indications of the frame boundaries and overhead bit
positions in the incoming G.747 signal.
Depending on configuration, declaration of DS2 out-of-frame occurs when 2 out
of 4 or 2 out of 5 consecutive F-bits are in error (These two ratios are
40
 

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