LC72348 View Datasheet(PDF) - SANYO -> Panasonic

Part Name

Description

View to exact match

LC72348

Low-Voltage ETR Controller with On-Chip LCD Driver

SANYO -> Panasonic 

LC72348G/W, 72349G/W

Continued from preceding page.

Instruc-

tions

Mnemonic

SEQ

SEQI

SNEI

SGE

SGEI

SLEI

AND

ANDI

OR

ORI

EXL

EXLI

SHR

LD

ST

MVRD

MVRS

MVSR

MVI

TMT

TMF

JMP

CAL

RT

RTI

Operand

1st 2nd

r

M

M

I

M

I

r

M

M

I

M

I

r

M

M

I

r

M

M

I

r

M

M

I

Function

Skip if r equal to M

Skip if M equal to I

Skip if M not equal to I

Skip if r is greater than or

equal to M

Skip if M is greater than

equal to I

Skip if M is less than I

AND M with r

AND I with M

OR M with r

OR I with M

Exclusive OR M with r

Exclusive OR M with M

r

Shift r right with carry

r

M

M

r

r

M

M

r

M1 M2

M

I

MN

MN

ADDR

Load M to r

Store r to M

Move M to destination M

referring to r in the same row

Move source M referring to r

to M in the same row

Move M to M in the same row

Move I to M

Test M bits, then skip if all bits

specified are true

Test M bits, then skip if all bits

specified are false

Jump to the address

ADDR

Call subroutine

Return from subroutine

Return from interrupt

Operations function

(r) – (M), skip if zero

(M) – I, skip if zero

(M) – I, skip if not zero

(r) – (M),

skip if not borrow

Instruction format

f edcba9876543210

0 0 0 1 0 0 DH

DL

r

0 0 0 1 0 1 DH

DL

I

0 0 0 0 0 1 DH

DL

I

0 0 0 1 1 0 DH

DL

r

(M) – I, skip if not borrow 0 0 0 1 1 1 DH

DL

I

(M) – I, skip if borrow

0 0 0 0 1 1 DH

DL

I

r ← (r) AND (M)

0 0 1 0 0 0 DH

DL

r

M ← (M) AND I

0 0 1 0 0 1 DH

DL

I

r ← (r) OR (M)

0 0 1 0 1 0 DH

DL

r

M ← (M) OR I

0 0 1 0 1 1 DH

DL

I

r ← (r) XOR (M)

0 0 1 1 0 0 DH

DL

r

M ← (M) XOR I

carry

(r)

0 0 1 1 0 1 DH

DL

I

000000001110

r

r ← (M)

1 1 0 1 0 0 DH

DL

r

M ← (r)

1 1 0 1 0 1 DH

DL

r

[DH, Rn] ← (M)

1 1 0 1 1 0 DH

DL

r

M ← [DH, Rn]

1 1 0 1 1 1 DH

DL

r

[DH, DL1] ← [DH, DL2] 1 1 1 0 0 0 DH

DL1

DL2

M←I

1 1 1 0 0 1 DH

DL

I

if M (N) = all 1s, then skip 1 1 1 1 0 0 DH

DL

N

if M (N) = all 0s, then skip 1 1 1 1 0 1 DH

DL

N

PC ← ADDR

PC ← ADDR

Stack ← (PC) + 1

PC ← Stack

PC ← Stack,

BANK ← Stack,

CARRY ← Stack

100

ADDR (13 bits)

101

ADDR (13 bits)

000000001000

000000001001

Continued on next page.

No. 6472-12/14

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