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MT88V32AP Просмотр технического описания (PDF) - Mitel Networks

Номер в каталогеКомпоненты Описаниепроизводитель
MT88V32AP 8 x 4 High Performance Video Switch Array Mitel
Mitel Networks Mitel
MT88V32AP Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MT88V32
Preliminary Information
AX1
AX0
AY2
AY1
AY0
Switch Connections
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
0
0
1
1
0
0
1
0
0
0
0
1
0
1
0
0
1
1
0
0
0
1
1
1
Y0 to X0
Y1 to X0
Y2 to X0
Y3 to X0
Y4 to X0
Y5 to X0
Y6 to X0
Y7 to X0
0
1
0
0
0
0
1
1
1
1
1
0
0
0
0
1
0
1
1
1
Y0 to X1
Y7 to X1
Y0 to X2
Y7 to X2
1
1
0
0
0
1
1
1
1
1
Y0 to X3
Y7 to X3
Table 2 - Address Decode Truth Table
It should be noted that the STROBE1 function is
disabled during a read cycle. See Fig. 15 for timing.
ground (R) should be present between the switches.
Selection of R is based on the following compromise:
The MT88V32 can operate from a dual rail power
supply (VDD and VEE) or a single rail power supply
(VSS=VEE=0V) as per the recommended operating
conditions. For minimum on-state resistance the
supply voltages should be VDD=5.0 VDC, VSS=0 VDC
and VEE=-7 VDC. The analog input signal should be
biased at -2.0 VDC to achieve minimum differential
phase and gain error (see AC Electrical
Characteristics - Crosspoint Performance).
Applications
Figure 3 illustrates examples of how to connect the
signal lines of the MT88V32 to various interfaces.
Input buffers allow the incoming signals to be scaled
and biased to the optimum operating range of the
MT88V32 (i.e., differential phase error, differential
gain error and RON). Buffers will also allow a more
precise input impedance to be implemented. For low
grade video applications, signal lines may be
connected directly, as long as the ultimate source
and terminating impedances are matched.
Output buffers may be used to provide signal gain
and impedance matching for external connections.
Additionally, they may be used to isolate parasitic
device capacitance in multiple stage switching
applications where high frequency roll-off is critical.
Crosstalk, as well as differential phase and gain error
can be minimized by designing a low source
impedance (e.g., 10 ohms), and a high terminating
impedance (e.g., 10k) at each stage. If successive
switching stages are not buffered, then a resistor to
1) as R is decreased to approach the source and
terminating resistance values signal loss will
increase and crosstalk will decrease, and
2) as R increases signal loss will decrease and
crosstalk will increase.
It is recommended that the power supply rails of the
MT88V32 be decoupled with 0.1µF ceramic Z5U and
10µF dipped tantalum capacitors. These capacitors
should be as close to the device as possible. The
signal pins of the MT88V32 are interleaved with
analog ground lines. This allows the circuit designer
to run ground tracks on both sides of each signal line
to improve crosstalk immunity.
The 8x4 bidirectional CMOS T-switch configuration is
a modular switching element in a convenient
package size. The inherent flexibility of this device
permits the designer to build large switching
matrices, see analog switch application notes.
A5 A4 A3 A2 A1 A0 D0
Function
0 0 0 0 0 0 1/0 Y0 to X0
↓↓↓↓↓↓
↓↓
0 1 1 1 1 1 1/0 Y7 to X3
1XXXX0 X
MR
1XXXX1 X
STB2
Table 3 - Address Decoding for the Processor
Interfaces
Note: x = undefined, 1/0 -1 = make, 0 = break
3-54
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