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74LVQ374(2001) View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
View to exact match
74LVQ374
(Rev.:2001)
Fairchild
Fairchild Semiconductor Fairchild
74LVQ374 Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
February 1992
Revised June 2001
74LVQ374
Low Voltage Octal D-Type Flip-Flop
with 3-STATE Outputs
General Description
The LVQ374 is a high-speed, low-power octal D-type flip-
flop featuring separate D-type inputs for each flip-flop and
3-STATE outputs for bus-oriented applications. A buffered
Clock (CP) and Output Enable (OE) are common to all flip-
flops.
Features
s Ideal for low power/low noise 3.3V applications
s Implements patented EMI reduction circuitry
s Available in SOIC JEDEC, SOIC EIAJ and QSOP pack-
ages
s Guaranteed simultaneous switching noise level and
dynamic threshold performance
s Improved latch-up immunity
s Guaranteed incident wave switching into 75
s 4 kV minimum ESD immunity
s Buffered positive edge-triggered clock
s 3-STATE outputs drive bus lines or buffer memory
address registers
Ordering Code:
Order Number Package Number
Package Description
74LVQ374SC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LVQ374SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVQ374QSC
MQA20
20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
D0–D7
CP
OE
O0–O7
Description
Data Inputs
Clock Pulse Input
3-STATE Output Enable Input
3-STATE Outputs
Truth Table
Inputs
Dn
H
L
CP
X
X
H = HIGH Voltage Level
X = Immaterial
= LOW-to-HIGH Transition
Outputs
OE
On
L
H
L
L
H
Z
L = LOW Voltage Level
Z = High Impedance
© 2001 Fairchild Semiconductor Corporation DS011360
www.fairchildsemi.com
 

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