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ST6391 View Datasheet(PDF) - STMicroelectronics

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ST6391 Datasheet PDF : 68 Pages
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TIMERS (Continued)
Figure 33. Timer Working Principle
ST6391,92,93,95,97,99
Timer Operating Modes
As on ST639x devices the external TIMER pin is not
available the only allowed operating mode is the out-
put mode that have to be selected by setting to 1 bit
4 and by clearing to 0 bit 5 in the TSCR1 register.
This procedurewill enable both Timer 1 and Timer 2.
Output Mode (TSCR1 D4 = 1, TSCR1 D5 = 0). On
this mode the timer prescaler is clocked by the
prescaler clock input (OSC/12). The user can se-
lect the desired prescaler division ratio through the
PS2/PS1/PS0 bits. When TCR count reaches 0, it
sets the TMZ bit in the TSCR.
The TMZ bit can be tested under program control
to perform timer functions whenever it goes high.
Bit D4 and D5 on TSCR2 (Timer 2) register are not
implemented.
Timer Interrupt
When the counter register decrements to zero and
the software controlled ETI (enable timer interrupt)
bit is set to one then an interrupt request associ-
ated to interrupt vector #3 (for Timer 1) and to inter-
rupt vector #1 (for Timer 2) is generated. When the
counter decrements to zero also the TMZ bit in the
TSCR register is set to one.
Notes :
TMZ is set when the counter reaches 00H ; how-
ever, it may be set by writing 00H in the TCR regis-
ter or setting the bit 7 of the TSCR register. TMZ
bit must be cleared by user software when servic-
ing the timer interrupt to avoid undesired interrupts
when leaving the interrupt service routine. After re-
set, the 8-bit counter register is loaded to FFh while
the 7-bit prescaler is loaded to 7Fh , and the TSCR
register is cleared which means that timer is
stopped (PSI=0) and timer interrupt disabled.
A write to the TCR register will predominate over
the 8-bit counter decrement to 00h function, i.e. if a
write and a TCR register decrement to 00h occur
simultaneously, the write will take precedence, and
the TMZ bit is not set until the 8-bit counter reaches
00h again. The values of the TCR and the PSC
registers can be read accurately at any time.
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