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UTCTEA1062A View Datasheet(PDF) - Unisonic Technologies

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UTCTEA1062A Datasheet PDF : 13 Pages
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Automatic gain control input(AGC)
Automatic line loss compensation is achieved by
connecting a resistor(R6) between AGC and VEE. The
automatic gain control varies the gain of the
microphone amplifier and the receiving amplifier in
accordance with the DC line current. The control range
is 5.8dB which corresponds to a line length of 5km for a
0.5mm diameter twisted pair copper cable with a DC
resistance of 176/km and average attenuation of
1.2dB/km. Resistor R6 should be chosen inaccordance
with the exchange supply voltage and its feeding bridge
resistance(see Fig.12 and Table 1). The ratio of start
and stop currents of the AGC curve is independent of
the value of R6. If no automatic line loss compensation
is required the AGC may be left open-circuit. The
amplifier, in this condition, will give their maximum
specified gain.
Side-tone suppression
The anti-sidetone network, R1//Zline, R2, R3, R8, R9
and Zbal,(see Fig.4) suppresses the transmitted signal
in the earpiece. Compensation is maximum when the
following conditions are fulfilled:
(a) R9*R2=R1[R3+(R8//Zbal)];
(b) [Zbal/(Zbal+R8)]=[Zline/(Zline+R1)];
If fixed values are chosen for R1, R2, R3 and R9 then
condition(a) will always be fullfilled when R8/Zball¡ ¶R3.
To obtain optimum side-tone suppression condition(b)
has to be fulfilled which results in:
Zbal=(R8/R1) Zline=k*Zline where k is a scale factor;
The scale factor (k), dependent on the value of R8, is
chosen to meet following criteria:
(a) Compatibility with a standard capacitor from the
E6 or E12 range for Zbal,
(b)£ ü Zbal//R8£ ü¡ ¶R3 fulfilling condition (a) and thus
ensuring correct anti-sidetone bridge operation,
(c)£ üZbal+R8£ ü¡ ·R9 to avoid influencing the trans-
mitter gain.
In practice Zline varies considerably with the type and
length. The value chosen for Zbal should therefore be
for an average line length thus giving optimum setting
for short or long lines.
to 600(176/km;38nF/km). When k=0.64 then
R8=390,Zbal=130+(820//220nF). At line currents
below 9mA the internal reference voltage is
automatically adjusted to a lower value(typically 1.6V at
1mA) This means that more sets can be operated in
parallel with DC line voltages (excluding the polarity
guard) down to an absolute minimum voltage of 1.6V.
With line currents below 9mA the circuit has limited
sending and receiving levels. The internal reference
voltage can be adjusted by means of an external
resistor(RVA). This resistor when connected between
LN and REG will decrease the internal reference
voltage and when connected between REG and SLPE
will increase the internal reference voltage. Current(Ip)
available from VCC for peripheral circuits depends on
the external components used. Fig.9 shows this current
for VCC > 2.2V. If MUTE is LOW (1062 is HIGH)when
the receiving amplifier is driven the available current is
further reduced. Current availability can be increased
by connecting the supply IC(1081) in parallel with R1,
as shown in Fig.16(c), or, by increasing the DC line
voltage by means of an external resistor(RVA)
connected between REG and SLPE.
The balance impedance Zbal at which the optimum
suppression is present can be calculated by: Suppose
Zline = 210+(1265//140nF) representing a 5km line
of 0.5 mm diameter, copper, twisted pair cable matched

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