S93VP662P-2.7TE13 View Datasheet(PDF) - Summit Microelectronics
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S93VP662P-2.7TE13 Datasheet PDF : 12 Pages
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PIN CONFIGURATION
S93VP662/S93VP663
DIP Package (P)
CS 1
SK 2
DI 3
DO 4
8 VCC
7 NC
6 NC
5 GND
SOIC Package (S)
CS 1
SK 2
DI 3
DO 4
8 VCC
7 NC
6 NC
5 GND
2019 ILL1 1.0
PIN FUNCTIONS
Pin Name
CS
SK
DI
DO
VCC
GND
Function
Chip Select
Clock Input
Serial Data Input
Serial Data Output
+2.7 to 6.0V Power Supply
Ground
DEVICE OPERATION
APPLICATIONS
The S93VP662/VP663 was designed specifically for
applications where the integrity of the stored data is
paramount. In recent years, as the operating voltage
range of serial E2PROMs has widened, most semicon-
ductor manufacturers have arbitrarily eliminated their
VCC sense circuits. The S93VP662/VP663 will protect
your data by guaranteeing write lockout below the se-
lected VCC Lockout voltage.
VCC Lockout
The S93VP662/VP663 has an on-board precision VCC
sense circuit. Whenever VCC is below VLOCK, the
S93VP662/VP663 will disable the internal write circuitry.
The VCC lockout circuit will ensure a higher level of data
integrity than can be expected from industry standard
devices that have either a very loose specification or no
VCC lockout specification.
During a power-on sequence all writes will be inhibited
below the VLOCK level and will continue to be held in a
write inhibit state for approximately 200ms after VCC
reaches, then stays at or above VLOCK. The 200ms delay
provides a buffer space for the microcontroller to com-
plete its power-on initialization routines (reading is OK)
while still protecting against inadvertent writes.
During a power-down sequence initiation of writes will
be inhibited whenever VCC falls below VLOCK. This will
guard against the system’s microcontroller performing
an inadvertent write within the ‘danger zone’. (see
AN003)
GENERAL OPERATION
The S93VP662/VP663 is a 4096-bit nonvolatile memory
intended for use with industry standard microproces-
sors. The S93VP663 is organized as X16, seven 11-bit
instructions control the reading, writing and erase
operations of the device. The S93VP662 is organized as
X8, seven 12-bit instructions control the reading, writing
and erase operations of the device. The device operates
on a single 3V or 5V supply and will generate on chip, the
high voltage required during any write operation.
Instructions, addresses, and write data are clocked into
the DI pin on the rising edge of the clock (SK). The DO
pin is normally in a high impedance state except when
reading data from the device, or when checking the
ready/busy status after a write operation.
The ready/busy status can be determined after the start
of a write operation by selecting the device (CS high) and
polling the DO pin; DO low indicates that the write
operation is not completed, while DO high indicates that
the device is ready for the next instruction. If necessary,
the DO pin may be placed back into a high impedance
2019 1.1 5/15/98
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