AD9114-DPG2-EBZ View Datasheet(PDF) - Analog Devices
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AD9114-DPG2-EBZ Datasheet PDF : 52 Pages
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AD9114/AD9115/AD9116/AD9117
THEORY OF OPERATION
Data Sheet
DB11
DB10
DB9
DB8
DVDDIO
DVSS
DVDD
DB7
DB6
DB5
1.8V
LDO
SPI
INTERFACE
1V
QRSET
2kΩ
10kΩ
IREF
100µA
1 INTO 2
INTERLEAVED
DATA
INTERFACE
BAND
GAP
I DATA
Q DATA
AD9117
IRSET
2kΩ
IRCM
60Ω TO
260Ω
I DAC
AUX1DAC
AUX2DAC
Q DAC
CLOCK
DIST
QRCM
60Ω TO
260Ω
62.5Ω
62.5Ω
62.5Ω
62.5Ω
RLIN
IOUTN
IOUTP
RLIP
AVDD
AVSS
RLQP
QOUTP
QOUTN
RLQN
Figure 84. Simplified Block Diagram
Figure 84 shows a simplified block diagram of the AD9114/
LDO is provided for DVDDIO supplies greater than 1.8 V, or the
AD9115/AD9116/AD9117 that consists of two DACs, digital
1.8 V can be supplied directly through DVDD. A 1.0 μF bypass
control logic, and a full-scale output current control. Each DAC
capacitor at DVDD (Pin 7) is required when using the LDO.
contains a PMOS current source array capable of providing a
maximum of 20 mA. The arrays are divided into 31 equal currents
that make up the five most significant bits (MSBs). The next four
bits, or middle bits, consist of 15 equal current sources whose
value is 1/16 of an MSB current source. The remaining LSBs are
binary weighted fractions of the current sources of the middle
bits. Implementing the middle and lower bits with current sources,
instead of an R-2R ladder, enhances its dynamic performance for
multitone or low amplitude signals and helps maintain the high
output impedance of the main DACs (that is, >200 MΩ).
The core is capable of operating at a rate of up to 125 MSPS. It
consists of edge-triggered latches and the segment decoding logic
circuitry. The analog section includes PMOS current sources,
associated differential switches, a 1.0 V band gap voltage
reference, and a reference control amplifier.
Each DAC full-scale output current is regulated by the reference
control amplifier and can be set from 4 mA to 20 mA via an external
resistor, xRSET, connected to its full-scale adjust pin (FSADJx).
The external resistor, in combination with both the reference control
The current sources are switched to one or the other of the two
output nodes (IOUTP or IOUTN) via PMOS differential current
switches. The switches are based on the architecture that was
pioneered in the AD976x family, with further refinements to
reduce distortion contributed by the switching transient. This
switch architecture also reduces various timing errors and provides
matching complementary drive signals to the inputs of the
differential current switches.
amplifier and voltage reference, VREFIO, sets the reference current,
IxREF, which is replicated to the segmented current sources with the
proper scaling factor. The full-scale current, IxOUTFS, is 32 × IxREF.
Optional on-chip xRSET resistors are provided that can be pro-
grammed between a nominal value of 1.6 kΩ to 8 kΩ (20 mA to
4 mA IxOUTFS, respectively).
The AD9114/AD9115/AD9116/AD9117 provide the option of
setting the output common mode to a value other than AGND via
The analog and digital I/O sections of the AD9114/AD9115/
the output common-mode pin (CMLI and CMLQ). This facilitates
AD9116/AD9117 have separate power supply inputs (AVDD and
directly interfacing the output of the AD9114/AD9115/AD9116/
DVDDIO) that can operate independently over a 1.8 V to 3.3 V
range. The core digital section requires 1.8 V. An optional on-chip
AD9117 to components that require common-mode levels greater
than 0 V.
Rev. D | Page 32 of 52
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