A14100 View Datasheet(PDF) - Microsemi Corporation

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A14100

Accelerator Series FPGAs – ACT 3 Family

Microsemi Corporation 

Accelerator Series FPGAs – ACT 3 Family

Determining Average Switching Frequency

To determine the switching frequency for a design, you must have a detailed understanding of the data

input values to the circuit. The following guidelines are meant to represent worst-case scenarios so that

they can be generally used to predict the upper limits of power dissipation. These guidelines are as

follows:

Table 2-13 • Guidelines for Predicting Power Dissipation

Data

Value

Logic Modules (m)

80% of modules

Inputs switching (n)

# inputs/4

Outputs switching (p)

# output/4

First routed array clock loads (q1)

40% of sequential modules

Second routed array clock loads (q2)

40% of sequential modules

Load capacitance (CL)

35 pF

Average logic module switching rate (fm)

F/10

Average input switching rate (fn)

F/5

Average output switching rate (fp)

F/10

Average first routed array clock rate (fq1)

F/2

Average second routed array clock rate (fq2)

F/2

Average dedicated array clock rate (fs1)

F

Average dedicated I/O clock rate (fs2)

F

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