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MC74HC03A View Datasheet(PDF) - Motorola => Freescale

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Description
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MC74HC03A Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad 2-Input NAND Gate
With Open-Drain Outputs
High–Performance Silicon–Gate CMOS
The MC74HC03A is identical in pinout to the LS03. The device inputs
are compatible with Standard CMOS outputs; with pullup resistors, they
are compatible with LSTTL outputs.
The HC03A NAND gate has, as its outputs, a high–performance MOS
N–Channel transistor. This NAND gate can, therefore, with a suitable
pullup resistor, be used in wired–AND applications. Having the output
characteristic curves given in this data sheet, this device can be used as
an LED driver or in any other application that only requires a sinking
current.
Output Drive Capability: 10 LSTTL Loads With Suitable Pullup Resistor
Outputs Directly Interface to CMOS, NMOS and TTL
High Noise Immunity Characteristic of CMOS Devices
Operating Voltage Range: 2 to 6V
Low Input Current: 1µA
In Compliance With the JEDEC Standard No. 7A Requirements
Chip Complexity: 28 FETs or 7 Equivalent Gates
DESIGN GUIDE
Criteria
Value
Unit
Internal Gate Count*
7.0
ea
Internal Gate Propagation Delay
1.5
ns
Internal Gate Power Dissipation
5.0
µW
Speed Power Product
0.0075
pJ
* Equivalent to a two–input NAND gate
1,4,9,12
A
2,5,10,13
B
LOGIC DIAGRAM
VCC
OUTPUT
PROTECTION
DIODE
3,6,8,11
Y*
PIN 14 = VCC
PIN 7 = GND
* Denotes open–drain outputs
MC74HC03A
14
1
14
1
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
D SUFFIX
SOIC PACKAGE
CASE 751A–03
14
1
DT SUFFIX
TSSOP PACKAGE
CASE 948G–01
ORDERING INFORMATION
MC74HCXXAN
MC74HCXXAD
MC74HCXXADT
Plastic
SOIC
TSSOP
FUNCTION TABLE
Inputs
Output
A
B
Y
L
L
Z
L
H
Z
H
L
Z
H
H
L
Z = High Impedance
Pinout: 14–Lead Packages (Top View)
VCC B4 A4 Y4 B3 A3 Y3
14 13 12 11 10 9 8
1234567
A1 B1 Y1 A2 B2 Y2 GND
10/95
© Motorola, Inc. 1995
1
REV 7
 

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