M74HC126B1R View Datasheet(PDF) - STMicroelectronics

Part Name

Description

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M74HC126B1R

QUAD BUS BUFFERS (3-STATE)

STMicroelectronics 

M54/74HC125

M54/74HC126

. HIGH SPEED

tPD = 8 ns (TYP.) AT VCC = 5 V

. LOW POWER DISSIPATION

ICC = 4 µA (MAX.) AT 25 °C

. OUTPUT DRIVE CAPABILITY

15 LSTTL LOADS

. BALANCED PROPAGATION DELAYS

tPLH = tPHL

. SYMMETRICAL OUTPUT IMPEDANCE

IOL = IOH = 6 mA (MIN.)

. HIGH NOISE IMMUNITY

VNIH = VNIL = 28 % VCC (MIN.)

. WIDE OPERATING VOLTAGE RANGE

VCC (OPR) = 2 V TO 6 V

. PIN AND FUNCTION COMPATIBLE

WITH 54/74LS125/126

QUAD BUS BUFFERS (3-STATE)

B1R

(Plastic Package)

F1R

(Ceramic Package)

M 1R

(Micro Package)

C1R

(Chip Carrier)

ORDER CODES :

M54HCXXXF1R M74HCXXXM1R

M74HCXXXB1R M74HCXXXC1R

DESCRIPTION

The M54/74HC125/126 are high speed CMOS

QUAD BUS BUFFER (3-STATE) FABRICATED IN

SILICON GATE C2MOS technology.

They have the same high speed performance of

LSTTL combined with true CMOS low power con-

sumption.

These devices require the same 3-STATE control

input G to be taken high to make the output go into

the high impedance state.

All inputs are equipped with protection circuits

against static discharge and transient excess volt-

age.

PIN CONNECTIONS (top view)

HC125

INPUT AND OUTPUT EQUIVALENT CIRCUIT

HC126

September 1993

NC =

No Internal

Connection

1/11

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