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74LCX125 View Datasheet(PDF) - STMicroelectronics

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Description
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74LCX125 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
®
74LCX125
LOW VOLTAGE CMOS QUAD BUS BUFFERS (3-STATE)
WITH 5V TOLERANT INPUTS AND OUTPUTS
s 5V TOLERANT INPUTS AND OUTPUTS
s HIGH SPEED:
tPD = 6 ns (MAX.) at VCC = 3V
s POWER-DOWN PROTECTION ON INPUTS
AND OUTPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24 mA (MIN)
s PCI BUS LEVELS GUARANTEED AT 24mA
s BALANCED PROPAGATION DELAYS:
tPLH tPHL
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 2.0V to 3.6V (1.5V Data Retention)
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 125
s LATCH-UP PERFORMANCE EXCEEDS 500mA
s ESD PERFORMANCE:
HBM >2000V; MM > 200V
DESCRIPTION
The LCX125 is a low voltage CMOS QUAD BUS
BUFFERS fabricated with sub-micron silicon gate
and double-layer metal wiring C2MOS
technology. It is ideal for low power and high
M
(Micro Package)
T
(TSSOP Package)
ORDER CODES :
74LCX125M
74LCX125T
speed 3.3V applications; it can be interfaced to
5V signal environment for both inputs and
outputs.
The device requires the 3-STATE control input G
to be set high to place the output in to the high
impedance state.
.It has same speed performance at 3.3V than 5V,
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
PIN CONNECTION AND IEC LOGIC SYMBOLS
February 1999
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