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74ALVCH16843 View Datasheet(PDF) - NXP Semiconductors.

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Description
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74ALVCH16843
NXP
NXP Semiconductors. NXP
74ALVCH16843 Datasheet PDF : 16 Pages
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Nexperia
74ALVCH16843
18-bit bus-interface D-type latch; 3-State
7 Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max
Unit
VCC
VI
VO
IIK
IOK
IO
ICC
IGND
Tstg
Ptot
supply voltage
input voltage
output voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
For control pins
For data inputs
VI < 0 V
VO > VCC or VO < 0 V
VO = 0 V to VCC
Tamb = -40 °C to +85 °C
-0.5
[1]
-0.5
[1]
-0.5
[1]
-0.5
-50
-
-
-
-100
-65
[2]
-
+4.6
V
+4.6
V
VCC + 0.5 V
VCC + 0.5 V
-
mA
±50
mA
±50
mA
100
mA
-
mA
+150 °C
600
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] Above 55 °C the value of Ptot derates linearly with 8 mW/K.
8 Recommended operating conditions
Table 5. Recommended operating conditions
Symbol Parameter
VCC
supply voltage
VI
VO
Tamb
Δt/ΔV
input voltage
output voltage
ambient temperature
input transition rise and fall rate
Conditions
maximum speed performance
CL = 30 pF
CL = 50 pF
in free air
VCC = 2.3 V to 3.0 V
VCC = 3.0 V to 3.6 V
Min
Max Unit
2.3
2.7
V
3.0
3.6
V
0
VCC
V
0
VCC
V
-40
+85 °C
-
20
ns/V
-
10
ns/V
74ALVCH16843
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 November 2017
© Nexperia B.V. 2017. All rights reserved.
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