ISL6590 View Datasheet(PDF) - Intersil

Part Name

Description

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ISL6590

Digital Multi-Phase PWM Controller for Core-Voltage Regulation

Intersil 

ISL6590

Electrical Specifications Operating Conditions: VDDIO = 3.3V, VDDCORE = 1.8V, TA = 25oC, Unless Otherwise Specified (Continued)

PARAMETER

TEST CONDITIONS

MIN TYP MAX UNITS

POWER-ON RESET AND ENABLE

POR Threshold

OUTEN Threshold

Vddio Rising

Vddio Falling

Vddcore Rising

Vddcore Falling

OUTEN Rising

1.4

-

-

V

-

-

2.55

V

0.7

-

-

V

-

-

1.4

V

-

0.71

-

V

OUTEN Falling

-

0.64

-

V

OSCILLATOR

Adjustment Range

0.250 -

1

MHz

Max Duty Cycle

24 TBD

-

%

NOTE:

1. Reserved for note.

Block Diagram

Ext_Reset

ATX

ARX

OUTEN

PWRGD

VID[5:0]

MDI

MCLK

MCS

MDO

OSC_OUT

OSC_IN

PLL_FILTER

POR

Asynchronous

Serial Interface

State

Control and

Fault

Monitor

Memory Bus

MUX

Feedback

Control PWM Driver

Current

Loop

Voltage

Loop

Clock

Distribution

Non-Volatile

SPI EEPOM

Interface

State

Machine

Control/

Status

Registers

MHz Memory

Mapped

Registers

AVP

Backside Serial

Bus

FIGURE 1. ISL6590 BLOCK DIAGRAM

PWM [6:1]

NDRIVE [6:1]

ATRH

ATRL

IDIG[6:1]

SOC

ERR

SCLK

SDATA

SYS_CLK

4

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