datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

SI5332 View Datasheet(PDF) - Silicon Laboratories

Part Name
Description
View to exact match
SI5332 Datasheet PDF : 69 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
3.5.3 LVCMOS Output Terminations
LVCMOS outputs are dc-coupled, as shown in the figure below.
1.71 to 6.36V
Set output driver
to 50Ω mode.
OUTx
OUTxb
Zo=50Ω
Zo=50Ω
Si5332 Data Sheet
Functional Description
Figure 3.13. LVCMOS Output Termination Example, Option 1
1.425 to 3.63V
Set output driver
to 25Ω mode.
OUTx
Rs
OUTxb
Rs
Rs = Zo – Rdrv
(see Table 5.8)
Figure 3.14. LVCMOS Output Termination Example, Option 2
3.5.4 LVCMOS Output Signal Swing
The signal swing (VOL/VOH) of the LVCMOS output drivers is set by the voltage on the VDDO pin for the respective bank.
3.5.5 LVCMOS Output Polarity
When a driver is configured as an LVCMOS output it generates a clock signal on both pins (OUTx and OUTxb). By default, the clock on
the OUTxb pin is generated in phase with the clock on the OUTx pin. The polarity of these clocks is configurable enabling complimenta-
ry clock generation and/or inverted polarity with respect to other output drivers.
3.5.6 LVCMOS Output Configurable Tr/Tf
The Si5332 has four settings to choose from for LVCMOS outputs up to 66 MHz at 50 Ω internal impedance drive a 5”, 50 Ω trace. This
can be configured using the ClockBuilder Pro software utility, or through the I2C programming interface. Output frequencies greater
than 66 MHz must use the fastest setting.
3.5.7 Output Enable/Disable
The universal hardware input pins can be programmed with either active low or active high polarity, to operate as output enable (OEb),
controlling one or more outputs. Pin assignment is done using ClockBuilder Pro. An output enable pin provides a convenient method of
disabling or enabling the output drivers. When the output enable pin is held high all designated outputs will be disabled. When held low,
the designated outputs will be enabled. Outputs in the enabled state can be individually disabled through register control.
3.5.8 Differential Output Configurable Skew Settings
Skew on the differential outputs can be independently configured. The skew is adjustable in 35 ps steps across a range of 280 ps.
silabs.com | Building a more connected world.
Rev. 1.0 | 16
 

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]