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ADC0804 View Datasheet(PDF) - Renesas Electronics

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ADC0804 Datasheet PDF : 17 Pages
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ADC0803, ADC0804
Finally, if time is short and capacitive loading is high, external
bus drivers must be used. These can be three-state buffers
(low power Schottky is recommended, such as the 74LS240
series) or special higher-drive-current products which are
designed as bus drivers. High-current bipolar bus drivers with
PNP inputs are recommended.
Power Supplies
Noise spikes on the V+ supply line can cause conversion
errors as the comparator will respond to this noise. A
low-inductance tantalum filter capacitor should be used close
to the converter V+ pin, and values of 1F or greater are
recommended. If an unregulated voltage is available in the
system, a separate 5V voltage regulator for the converter (and
other analog circuitry) will greatly reduce digital noise on the
V+ supply. An lCL7663 can be used to regulate such a supply
from an input as low as 5.2V.
Wiring and Hook-Up Precautions
Standard digital wire-wrap sockets are not satisfactory for
breadboarding with this A/D converter. Sockets on PC boards
can be used. All logic signal wires and leads should be
grouped and kept as far away as possible from the analog
signal leads. Exposed leads to the analog inputs can cause
undesired digital noise and hum pickup; therefore, shielded
leads may be necessary in many applications.
A single-point analog ground should be used which is
separate from the logic ground points. The power supply
bypass capacitor and the self-clockIng capacitor (if used)
should both be returned to digital ground. Any VREF/2 bypass
capacitors, analog input filter capacitors, or input signal
shielding should be returned to the analog ground point. A
test for proper grounding is to measure the zero error of the
A/D converter. Zero errors in excess of 1/4 LSB can usually
be traced to improper board layout and wiring (see Zero Error
for measurement). Further information can be found in
Application Note AN018.
Testing the A/D Converter
There are many degrees of complexity associated with testing
an A/D converter. One of the simplest tests is to apply a known
analog input voltage to the converter and use LEDs to display
the resulting digital output code as shown in Figure 18.
For ease of testing, the VREF/2 (pin 9) should be supplied with
2.560V and a V+ supply voltage of 5.12V should be used. This
provides an LSB value of 20mV.
If a full scale adjustment is to be made, an analog input
voltage of 5.090V (5.120 - 11/2 LSB) should be applied to the
VIN(+) pin with the VIN(-) pin grounded. The value of the
VREF/2 input voltage should be adjusted until the digital
output code is just changing from 1111 1110 to 1111 1111.
This value of VREF/2 should then be used for all the tests.
The digital-output LED display can be decoded by dividing
the 8 bits into 2 hex characters, one with the 4 most-
significant bits (MS) and one with the 4 least-significant bits
(LS). The output is then interpreted as a sum of fractions
times the full scale voltage:
VOUT
=
M------S--
16
+
2--L--5-S--6--
5 .12
V
.
10k
150pF
N.O.
START
VIN (+) 0.1F
AGND
2.560V
VREF/2
0.1F
1
2
3
4
5 ADC0803-
6 ADC0804
7
8
9
10
DGND
20
19
+
5.120V
10F
TANTALUM
18
LSB
17
16
15
5V
14
13
12
11
MSB
1.3kLEDs
(8) (8)
FIGURE 18. BASIC TESTER FOR THE A/D
For example, for an output LED display of 1011 0110, the MS
character is hex B (decimal 11) and the LS character is hex
(and decimal) 6, so:
VOUT
=
11----16--
+ 2----56---6-- 5.12
=
3 .64V.
Figures 19 and 20 show more sophisticated test circuits.
ANALOG
INPUTS
8-BIT
A/D UNDER
TEST
“B”
R
R
“A”
10-BIT
DAC
VANALOG OUTPUT
R
-
A1 +
100R
R
“C”
-
+ A2
100X ANALOG
ERROR VOLTAGE
FIGURE 19. A/D TESTER WITH ANALOG ERROR OUTPUT. THIS
CIRCUIT CAN BE USED TO GENERATE “ERROR
PLOTS” OF FIGURE 11.
DIGITAL
INPUTS
10-BIT
DAC
VANALOG
A/D UNDER
TEST
DIGITAL
OUTPUTS
FIGURE 20. BASIC “DIGITAL” A/D TESTER
FN3094 Rev 4.00
August 2002
Page 12 of 17
 

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