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SAA5563PS/NNNN View Datasheet(PDF) - Philips Electronics

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8.5 SFR memory
The Special Function Register (SFR) space is used for port latches, timer, peripheral control, acquisition control, display control, etc. These registers
can only be accessed by direct addressing. Sixteen of the addresses in the SFR space are both bit and byte addressable. The bit addressable SFRs
are those whose address ends in 0H or 8H. A summary of the SFR map in address order is shown in Table 4.
A description of each of the SFR bits is shown in Table 5 which presents the SFRs in alphabetical order.
Table 4 SFR memory map
ADD R/W NAME
80H R/W P0
81H R/W SP
82H R/W DPL
83H R/W DPH
87H R/W PCON
88H R/W TCON
89H R/W TMOD
8AH R/W TL0
8BH R/W TL1
8CH R/W TH0
8DH R/W TH1
90H R/W P1
96H R/W P0CFGA
97H R/W P0CFGB
98H R/W SADB
9EH R/W P1CFGA
9FH R/W P1CFGB
A0H R/W P2
A6H R/W P2CFGA
A7H R/W P2CFGB
A8H R/W IE
B0H R/W P3
7
P07
SP7
DPL7
DPH7
0
TF1
GATE
TL07
TL17
TH07
TH17
P17
P0CFGA7
P0CFGB7
0
P1CFGA7
P1CFGB7
P27
P2CFGA7
P2CFGB7
EA
P37
6
P06
SP6
DPL6
DPH6
ARD
TR1
C/T
TL06
TL16
TH06
TH16
P16
P0CFGA6
P0CFGB6
0
P1CFGA6
P1CFGB6
P26
P2CFGA6
P2CFGB6
EBUSY
P36
5
P05
SP5
DPL5
DPH5
RFI
TF0
M1
TL05
TL15
TH05
TH15
P15
P0CFGA5
P0CFGB5
0
P1CFGA5
P1CFGB5
P25
P2CFGA5
P2CFGB5
ES2
P35
4
P04
SP4
DPL4
DPH4
WLE
TR0
M0
TL04
TL14
TH04
TH14
P14
P0CFGA4
P0CFGB4
DC_COMP
P1CFGA4
P1CFGB4
P24
P2CFGA4
P2CFGB4
ECC
P34
3
P03
SP3
DPL3
DPH3
GF1
IE1
GATE
TL03
TL13
TH03
TH13
P13
P0CFGA3
P0CFGB3
SAD3
P1CFGA3
P1CFGB3
P23
P2CFGA3
P2CFGB3
ET1
P33
2
P02
SP2
DPL2
DPH2
GF0
IT1
C/T
TL02
TL12
TH02
TH12
P12
P0CFGA2
P0CFGB2
SAD2
P1CFGA2
P1CFGB2
P22
P2CFGA2
P2CFGB2
EX1
P32
1
P01
SP1
DPL1
DPH1
PD
IE0
M1
TL01
TL11
TH01
TH11
P11
P0CFGA1
P0CFGB1
SAD1
P1CFGA1
P1CFGB1
P21
P2CFGA1
P2CFGB1
ET0
P31
0
P00
SP0
DPL0
DPH0
IDL
IT0
M0
TL00
TL10
TH00
TH10
P10
P0CFGA0
P0CFGB0
SAD0
P1CFGA0
P1CFGB0
P20
P2CFGA0
P2CFGB0
EX0
P30
RESET
FFH
07H
00H
00H
00H
00H
00H
00H
00H
00H
00H
FFH
FFH
00H
00H
FFH
00H
FFH
FFH
00H
00H
FFH
 

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