ARM7TDMI View Datasheet(PDF) - Unspecified

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Description

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ARM7TDMI

General-Purpose 32-Bit Microprocessors

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Introduction

Addressing mode

Mode 2, privileged <a_mode2P>

Table 1-3 Addressing modes (continued)

Type or

addressing mode

Mnemonic or stack type

Immediate

[Rn], #+/-12bit_Offset

Register

[Rn], +/-Rm

Scaled register

[Rn], +/-Rm, LSL #5bit_shift_imm

[Rn], +/-Rm, LSR #5bit_shift_imm

[Rn], +/-Rm, ASR #5bit_shift_imm

[Rn], +/-Rm, ROR #5bit_shift_imm

[Rn, +/-Rm, RRX]

Immediate offset

[Rn, #+/-12bit_Offset]

Register offset

[Rn, +/-Rm]

Scaled register offset [Rn, +/-Rm, LSL #5bit_shift_imm]

[Rn, +/-Rm, LSR #5bit_shift_imm]

[Rn, +/-Rm, ASR #5bit_shift_imm]

[Rn, +/-Rm, ROR #5bit_shift_imm]

[Rn, +/-Rm, RRX]

Post-indexed offset -

Immediate

[Rn], #+/-12bit_Offset

Register

[Rn], +/-Rm

Scaled register

[Rn], +/-Rm, LSL #5bit_shift_imm

[Rn], +/-Rm, LSR #5bit_shift_imm

[Rn], +/-Rm, ASR #5bit_shift_imm

[Rn], +/-Rm, ROR #5bit_shift_imm

[Rn, +/-Rm, RRX]

1-16

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ARM DDI 0029G

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