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AR0141CS View Datasheet(PDF) - ON Semiconductor

Part Name
Description
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AR0141CS
ON-Semiconductor
ON Semiconductor ON-Semiconductor
AR0141CS Datasheet PDF : 48 Pages
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AR0141CS
Digital Digital
I/O Core
Power1 Power1
HiSPi PLL Analog Analog
Power1 Power1 Power1 Power1
Master Clock
(6 50 MHz)
From Controller
VDD_IO VDD
EXTCLK
SADDR
SDATA
SCLK
TRIGGER
OE_BAR
RESET_BAR
TEST
VDD_PLL VAA VAA_PIX
DGND
SLVS0_P
SLVS0_N
SLVS1_P
SLVS1_N
SLVS2_P
SLVS2_N
SLVS3_P
SLVS3_N
SLVSC_P
SLVSC_N
FLASH
SHUTTER
AGND
VDD_IO
VDD VDD_SLVS VDD_PLL
VAA
VAA_PIX
Digital
Ground
Analog
Ground
To Controller
Notes:
1. All power supplies must be adequately decoupled.
2. ON Semiconductor recommends a resistor value of 1.5 kW, but a greater value may be used for slower twowire speed.
3. The parallel interface output pads can be left unconnected if the serial output interface is used.
4. ON Semiconductor recommends that 0.1 mF and 10 mF decoupling capacitors for each power supply are mounted as
close as possible to the pad. Actual values and results may vary depending on layout and design considerations.
Check the AR0141CS demo headboard schematics for circuit recommendations.
5. ON Semiconductor recommends that analog power planes are placed in a manner such that coupling with the digital
power planes is minimized.
6. I/O signals voltage must be configured to match VDD_IO voltage to minimize any leakage currents.
Figure 2. Typical Configuration: Serial FourLane HiSPi Interface
www.onsemi.com
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