AR0141CS
1 UI
dataN (DATAN_DEL = 000)
cp (CLOCK_DEL = 000)
cp (CLOCK_DEL = 001)
cp (CLOCK_DEL = 010)
cp (CLOCK_DEL = 011)
cp (CLOCK_DEL = 100)
cp (CLOCK_DEL = 101)
cp (CLOCK_DEL = 110)
cp (CLOCK_DEL = 111)
Increasing CLOCK_DEL[2:0] Increases Clock Delay
Figure 12. Delaying the Clock with Respect to Data
cp (CLOCK_DEL = 000)
dataN (DATAN_DEL = 000)
dataN (DATAN_DEL = 001)
dataN (DATAN_DEL = 010)
dataN (DATAN_DEL = 011)
dataN (DATAN_DEL = 100)
dataN (DATAN_DEL = 101)
dataN (DATAN_DEL = 110)
dataN (DATAN_DEL = 111)
Increasing DATAN_DEL[2:0] Increases Data Delay
tDLLSTEP
1 UI
Figure 13. Delaying Data with Respect to the Clock
HiSPi Protocol Layer
The HiSPi protocol is described in the HiSPi Protocol
Specification document.
Serial Configuration
The serial format should be configured using R0x31AC.
Refer to the AR0141CS Register Reference document for
more detail regarding this register.
The serial_format register (R0x31AE) controls which
serial format is in use when the serial interface is enabled
(reset_register[12] = 0). The following serial formats are
supported:
• 0x0304 − Sensor supports quad−lane HiSPi operation
• 0x0302 − Sensor supports dual−lane HiSPi operation
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