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AR0141CS(2015) View Datasheet(PDF) - ON Semiconductor

Part Name
Description
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AR0141CS
(Rev.:2015)
ON-Semiconductor
ON Semiconductor ON-Semiconductor
AR0141CS Datasheet PDF : 63 Pages
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AR0141CS: 1/4-Inch Digital Image Sensor
Electrical Specifications
Electrical Specifications
Unless otherwise stated, the following specifications apply under the following condi-
tions:
VDD = 1.8V – 0.10/+0.15; VDD_IO = VDD_PLL = VAA = VAA_PIX = 2.8V ± 0.3V;
VDD_SLVS = 0.4V – 0.1/+0.2; TA = -30°C to +85°C; output load = 10pF;
frequency = 74.25 MHz; HiSPi off.
Two-Wire Serial Register Interface
The electrical characteristics of the two-wire serial register interface (SCLK, SDATA) are
shown in Figure 41 and Table 18.
Figure 41: Two-Wire Serial Bus Timing Parameters
SDATA
tf
SCLK
S
tLOW
tr
tSU;DAT
tf
tHD;STA
tHD;DAT
tHIGH
tSU;STA
tHD;STA
Sr
tr
tBUF
tSU;STO
P
S
Note:
Read sequence: For an 8-bit READ, read waveforms start after WRITE command and register
address are issued.
Table 18:
Two-Wire Serial Bus Characteristics
fEXTCLK = 27 MHz; VDD = 1.8V; VDD_IO = 2.8V; VAA = 2.8V; VAA_PIX = 2.8V;
VDD_PLL = 2.8V; VDD_DAC = 2.8V; TA = 25°C
Parameter
SCLK Clock Frequency
Hold time (repeated) START condition
After this period, the first clock pulse is
generated
LOW period of the SCLK clock
HIGH period of the SCLK clock
Set-up time for a repeated START
condition
Data hold time
Data set-up time
Rise time of both SDATA and SCLK signals
Fall time of both SDATA and SCLK signals
Set-up time for STOP condition
Bus free time between a STOP and START
condition
Capacitive load for each bus line
Symbol
fSCL
tHD;STA
tLOW
tHIGH
tSU;STA
tHD;DAT
tSU;DAT
tr
tf
tSU;STO
tBUF
Cb
Standard Mode
Min
Max
0
100
Fast Mode
Min
Max
Unit
0
400
kHz
4.0
-
0.6
-
s
4.7
-
1.3
-
s
4.0
-
0.6
-
s
4.7
-
0.6
-
S
04
3.455
06
0.95
s
250
-
1006
-
ns
-
1000
20 + 0.1Cb7
300
ns
-
300
20 + 0.1Cb7
300
ns
4.0
-
0.6
-
s
4.7
-
1.3
-
s
-
400
-
400
pF
AR0141CS DS Rev. D Pub. 6/15 EN
48
©Semiconductor Components Industries, LLC, 2015.
 

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