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AR0141CS(2015) View Datasheet(PDF) - ON Semiconductor

Part Name
Description
View to exact match
AR0141CS
(Rev.:2015)
ON-Semiconductor
ON Semiconductor ON-Semiconductor
AR0141CS Datasheet PDF : 63 Pages
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Gain Stages
AR0141CS: 1/4-Inch Digital Image Sensor
Gain Stages
The sensor analog gain stage will apply the same analog gain to each color channel.
Digital gain can be configured to separate levels for each color channel.
The level of analog gain applied is controlled by the coarse_gain and fine_gain at
R0x3060 analog gain register. The analog readout circuitry can be configured differently
for each analog gain level. Total analog gain is (2coarse_gain) x(1+fine_gain/16), where
coarse_gain = R0x3060[6:4], fine_gain = R0x3060[3:0]. ON Semiconductor recommends
limiting maximum analog gain up to 12x gain for optimal image quality.
Each digital gain can be configured from a gain of 0 to 15.992 using R0x3056, R0x3058,
R0x305A, R0x305C, and R0x305E digital gain registers. The digital gain supports 128 gain
steps per 6dB of gain. The format of each digital gain register is “xxxx.yyyyyyy” where
“xxxx” refers an integer gain of 1 to 15 and “yyyyyyy” is a fractional gain ranging from 0/
128 to 127/128.
The sensor includes a digital dithering feature to reduce quantization noise resulting
from using digital gain. It can be implemented by setting R0x30BA[5] to 1. The default
value is 0.
AR0141CS DS Rev. D Pub. 6/15 EN
19
©Semiconductor Components Industries, LLC, 2015.
 

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