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DAC5687 View Datasheet(PDF) - Texas Instruments

Part NameDescriptionManufacturer
DAC5687 16-BIT, 500 MSPS 2?8 INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC) Texas-Instruments
Texas Instruments Texas-Instruments
DAC5687 Datasheet PDF : 80 Pages
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DAC5687
www.ti.com
SLWS164E – FEBRUARY 2005 – REVISED SEPTEMBER 2006
Coarse Mixer (CMIX) Synchronization
The coarse mixer implements the fDAC/2 and fDAC/4 (and –fDAC/4) fixed complex mixing operation using simple
complements of the data-path signals to create the proper sequences. The sequences are controlled using a
simple counter, and this counter can be synchronously reset using the PHSTR signal.
Similar to the NCO, the PHSTR signal used by the coarse mixer is from the FIFO output. This introduces the
same uncertainty effect due to the FIFO input-to-output pointer relationship. Bypassing the FIFO and using the
dual external clock mode without FIFO eliminates this uncertainty for systems using multiple DAC5687 devices
when this cannot be tolerated. Using the internal PLL, as with the NCO, allows the complete control and
synchronization of the coarse mixer.
sync_cm
PHSTR
DQ DQ DQ
FIFO
PHSTR Sync to
Coarse Mixer
DQ DQ
DQ
Sequencer
Reset
PLLLOCK
CLK1
CLK1C
MUX
clk_in
clk_out
clk_cmix
Clock
Generator
PLL VCO
CLK2
CLK2C
{PLLVDD, inv_plllock, dual_clk}
Figure 56. Logic Path for PHSTR Synchronization Signal to CMIX Reset
B0169-01
To enable the PHSTR synchronous reset, the serial interface bit sync_cm in register SYNC_CNTL must be set.
The coarse mixer sequence counter is held in reset when PHSTR is low and operates when PHSTR is high.
Copyright © 2005–2006, Texas Instruments Incorporated
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