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DAC5687 View Datasheet(PDF) - Texas Instruments

Part NameDescriptionManufacturer
DAC5687 16-BIT, 500 MSPS 2×?8× INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC) Texas-Instruments
Texas Instruments Texas-Instruments
DAC5687 Datasheet PDF : 80 Pages
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DAC5687
www.ti.com
SLWS164E – FEBRUARY 2005 – REVISED SEPTEMBER 2006
Register Name: CONFIG3—Address: 0x04, Default = 0x00
BIT 7
BIT 0
sif_4pin
dac_ser_data
half_rate
unused
usb
0
0
0
0
0
counter_mode(2:0)
0
0
0
sif_4pin: Four-pin serial interface mode is enabled when set, three-pin mode when cleared.
dac_ser_data: When set, both DAC A and DAC B input data is replaced with fixed data loaded into the 16-bit
serial interface ser_data register.
half_rate: Enables half-rate input mode. Input data for the DAC A data path is input to the chip at half speed
using both the DA[15:0] and DB[15:0] input pins.
usb: When set, the data to DACB is inverted to generate upper-sideband output.
counter_mode(2:0): Controls the internal counter that can be used as the DAC data source. Replaces digital
values at DACs with a cyclic counter.
{0XX = off; 100 = all 16b; 101 = 7b LSBs; 110 = 5b MIDs; 111 = 5b MSBs}
Register Name: SYNC_CNTL—Address: 0x05, Default = 0x00
BIT 7
BIT 0
sync_phstr
0
sync_nco
0
sync_cm
0
sync_fifo(2:0)
0
0
0
unused
0
unused
0
sync_phstr: When set, the internal clock divider logic is initialized with a PHSTR pin low-to-high transition.
sync_nco: When set, the NCO phase accumulator is cleared with a PHSTR low-to-high transition.
sync_cm: When set, the coarse mixer is initialized with a PHSTR low-to-high transition.
sync_fifo(2:0): Sync source selection mode for the FIFO. When a low-to-high transition is detected on the
selected sync source, the FIFO input and output pointers are initialized.
Table 4. Synchronization Source
sync_fifo(2:0)
000
001
010
011
100
101
110
111
Synchronization Source
TXENABLE pin
PHSTR pin
QFLAG pin
DB[15]
DA[15] first transition (one shot)
Software sync using SIF write
Sync source disabled (always off)
Always on
Register Name: SER_DATA_0—Address: 0x06, Default = 0x00
BIT 7
dac_data(7:0)
0
0
0
0
0
0
0
dac_data(7:0): Lower 8 bits of DAC data input to the DACs when dac_ser_data is set.
BIT 0
0
Copyright © 2005–2006, Texas Instruments Incorporated
Product Folder Link(s): DAC5687
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