datasheetbank_Logo     Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

DAC5687 View Datasheet(PDF) - Texas Instruments

Part NameDescriptionManufacturer
DAC5687 16-BIT, 500 MSPS 2×?8× INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER (DAC) Texas-Instruments
Texas Instruments Texas-Instruments
DAC5687 Datasheet PDF : 80 Pages
First Prev 21 22 23 24 25 26 27 28 29 30 Next Last
DAC5687
SLWS164E – FEBRUARY 2005 – REVISED SEPTEMBER 2006
www.ti.com
Programming Registers
REGISTER MAP
Name
VERSION
CONFIG0
CONFIG1
CONFIG2
CONFIG3
Address Default
0x00
0x01
0x02
0x03
0x04
0x03
0x00
0x00
0x80
0x00
SYNC_CNTL
SER_DATA_0
SER_DATA_1
Factory use only
NCO_FREQ_0
NCO_FREQ_1
NCO_FREQ_2
NCO_FREQ_3
NCO_PHASE_0
NCO_PHASE_1
DACA_OFFSET_0
DACB_OFFSET_0
DACA_OFFSET_1
DACB_OFFSET_1
QMCA_GAIN_0
QMCB_GAIN_0
QMC_PHASE_0
QMC_PHASE_GAIN_1
DACA_GAIN_0
DACB_GAIN_0
DACA_DACB_GAIN_1
Factory use only
ATEST
DAC_TEST
Factory use only
Factory use only
Factory use only
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x40
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0xFF
0x00
0x00
0x00
0x00
0x00
0x00
Bit 7
(MSB)
Bit 6
sleep_daca sleep_dacb
pll_div(1:0)
qflag
interl
nco
nco_gain
sif_4pin
dac_ser_dat
a
sync_phstr sync_nco
Bit 5
hpla
pll_freq
dual_clk
qmc
half_rate
sync_cm
Bit 4
hplb
pll_kv
twos
unused
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
unused
version(2:0)
interp(1:0)
inv_plllock
fifo_bypass
rev_abus rev_bbus fir_bypass
full_bypass
cm_mode(3:0)
invsinc
usb
counter_mode(2:0)
sync_fifo(2:0)
dac_data(7:0)
dac_data(15:8)
unused
unused
freq(7:0)
freq(15:8)
freq(23:16)
freq(31:24)
phase(7:0)
phase(15:8)
daca_offset(7:0)
dacb_offset(7:0)
daca_offset(12:8)
dacb_offset(12:8)
qmc_gain_a(7:0)
qmc_gain_b(7:0)
qmc_phase(7:0)
qmc_phase(9:8)
qmc_gain_a(10:8)
daca_gain(7:0)
dacb_gain(7:0)
daca_gain(11:8)
unused
unused
unused
unused
unused
unused
qmc_gain_b(10:8)
dacb_gain(11:8)
atest(4:0)
factory use only
phstr_del(1:0)
unused
phstr_clkdiv_sel
Register Name: VERSION—Address: 0x00, Default = 0x03
BIT 7
sleep_daca
sleep_dacb
hpla
0
0
0
hplb
unused
0
0
version(2:0)
0
1
sleep_daca: DAC A sleeps when set, operational when cleared.
sleep_dacb: DAC B sleeps when set, operational when cleared.
hpla: A-side first FIR filter in high-pass mode when set, low-pass mode when cleared.
hplb: B-side first FIR filter in high-pass mode when set, low-pass mode when cleared.
version(2:0): A hardwired register that contains the version of the chip. Read-only.
BIT 0
1
24
Submit Documentation Feedback
Product Folder Link(s): DAC5687
Copyright © 2005–2006, Texas Instruments Incorporated
Direct download click here

 

Share Link : 

All Rights Reserved © datasheetbank.com 2014 - 2020 [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]