AD7533_01 View Datasheet(PDF) - Intersil
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AD7533_01 Datasheet PDF : 9 Pages
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AD7523, AD7533
TABLE 2. UNlPOLAR BINARY CODE - AD7533
DIGITAL INPUT
MSB LSB
1111111111
1000000001
(NOTE 10)
NOMINAL ANALOG OUTPUT
–VR
E
F
11----00---22---34--
–VR
E
F
1--5--0-1--2--3-4--
1000000000
0111111111
–
V
R
EF
1--5--0--1-2--2-4--
=
– -V----R--2--E----F-
–VR
E
F
1--5--0-1--2--1-4--
0000000001
–VR
E
F
1----0--1-2---4--
0000000000
–VR
E
F
1----0-0--2---4--
=
0
NOTES:
10. VOUT as shown in Figure 2.
11. Nominal Full Scale for the circuit of Figure 2 is given by:
FS
=
–
VRE
F
11----00---22---34--
.
12. Nominal LSB magnitude for the circuit of Figure 2 is given by:
LSB
=
V
R
EF
1----0--1-2---4--
.
Zero Offset Adjustment
5. Connect all digital inputs to GND.
6. Adjust the offset zero adjust trimpot of the output
operational amplifier for 0V ±1mV (Max) at VOUT.
Gain Adjustment
1. Connect all digital inputs to V+.
2. Monitor VOUT for a -VREF (1 - 1/210) reading.
3. To increase VOUT, connect a series resistor, R2, (0Ω to
250Ω) in the IOUT1 amplifier feedback loop.
4. To decrease VOUT, connect a series resistor, R1, (0Ω to
250Ω) between the reference voltage and the VREF
terminal.
Bipolar (Offset Binary) Operation - AD7523
The circuit configuration for operating the AD7523 in the
bipolar mode is given in Figure 3. Using offset binary digital
input codes and positive and negative reference voltage
values, Four-Quadrant multiplication can be realized. The
“Digital Input Code/Analog Output Value” table for bipolar
mode is given in Table 3.)
A “Logic 1” input at any digital input forces the corresponding
ladder switch to steer the bit current to IOUT1 bus. A “Logic
0” input forces the bit current to IOUT2 bus. For any code the
IOUT1 and IOUT2 bus currents are complements of one
another. The current amplifier at IOUT2 changes the polarity
of IOUT2 current and the transconductance amplifier at IOUT
output sums the two currents. This configuration doubles the
output range. The difference current resulting at zero offset
binary code, (MSB = “Logic 1”, all other bits = “Logic 0”), is
corrected by using an external resistor, (10MΩ), from VREF
to IOUT2 (Figure 3).
5
TABLE 3. BlPOLAR (OFFSET BINARY) CODE - AD7523
DIGITAL INPUT
MSB LSB
ANALOG OUTPUT
11111111
–V R E F 11----22---78--
10000001
–V R E F 1----21---8--
10000000
0
01111111
+VR
E
F
1----21---8--
00000001
+VR
E
F
11----22---78--
00000000
+VR
E
F
11----22---88--
NOTES:
13.
1 LSB
=
( 2–7 ) ( VR E F )
=
1----12---8--
(
VR
E
F
)
.
Offset Adjustment
1. Adjust VREF to approximately +10V.
2. Connect all digital inputs to “Logic 1”.
3. Adjust IOUT2 amplifier offset adjust trimpot for 0V ±1mV at
IOUT2 amplifier output.
4. Connect MSB (Bit 1) to “Logic 1” and all other bits to
“Logic 0”.
5. Adjust IOUT1 amplifier offset adjust trimpot for 0V ±1mV
at VOUT .
Gain Adjustment
1. Connect all digital inputs to V+.
2. Monitor VOUT for a -VREF (11/28) volts reading.
3. To increase VOUT , connect a series resistor, R2, of up to
250Ω between VOUT and RFEEDBACK .
4. To decrease VOUT , connect a series resistor, R1, of up to
250Ω between the reference voltage and the VREF
terminal.
Bipolar (Offset Binary) Operation - AD7533
The circuit configuration for operating the AD7533 in the
bipolar mode is given in Figure 3. Using offset binary digital
input codes and positive and negative reference voltage
values, 4-Quadrant multiplication can be realized. The
“Digital Input Code/Analog Output Value” table for bipolar
mode is given in Table 4.
A “Logic 1” input at any digital input forces the
corresponding ladder switch to steer the bit current to
IOUT1 bus. A “Logic 0” input forces the bit current to IOUT2
bus. For any code the IOUT1 and IOUT2 bus currents are
complements of one another. The current amplifier at
IOUT2 changes the polarity of IOUT2 current and the
transconductance amplifier at IOUT1 output sums the two
currents. This configuration doubles the output range. The
difference current resulting at zero offset binary code,
(MSB = “Logic 1”, all other bits = “Logic 0”), is corrected by
using an external resistor, (10MΩ), from VREF to IOUT2 .
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