74HC132N,652 View Datasheet(PDF) - NXP Semiconductors.
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74HC132N,652 Datasheet PDF : 20 Pages
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NXP Semiconductors
74HC132; 74HCT132
Quad 2-input NAND Schmitt trigger
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P$
DDD
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P$
DDD
9,1 9
a. VCC = 4.5 V
Fig 10. Typical 74HCT132 transfer characteristics
9,1 9
b. VCC = 5.5 V
15. Application information
The slow input rise and fall times cause additional power dissipation, this can be
calculated using the following formula:
Padd = fi (tr ICC(AV) + tf ICC(AV)) VCC where:
Padd = additional power dissipation (W);
fi = input frequency (MHz);
tr = rise time (ns); 10 % to 90 %;
tf = fall time (ns); 90 % to 10 %;
ICC(AV) = average additional supply current (A).
Average ICC(AV) differs with positive or negative input transitions, as shown in Figure 11
and Figure 12.
An example of a relaxation circuit using the 74HC132; 74HCT132 is shown in Figure 13.
74HC_HCT132
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 1 December 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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