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74ACQ544SCX View Datasheet(PDF) - Fairchild Semiconductor

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74ACQ544SCX Datasheet PDF : 9 Pages
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Logic Symbols
IEEE/IEC
Logic Diagram
Functional Description
The ACQ/ACTQ544 contains two sets of eight D-type
latches, with separate input and output controls for each
set. For data flow from A to B, for example, the A-to-B
Enable (CEAB) input must be LOW in order to enter data
from A0 A7 or take data from B0 B7, as indicated in the
Data I/O Control Table. With CEAB LOW, a LOW signal on
the A-to-B Latch Enable (LEAB) input makes the A-to-B
latches transparent; a subsequent LOW-to-HIGH transition
of the LEAB signal puts the A latches in the storage mode
and their outputs no longer change with the A inputs. With
CEAB and OEAB both LOW, the 3-STATE B output buffers
are active and reflect the data present at the output of the A
latches. Control of data flow from B to A is similar, but using
the CEBA, LEBA and OEBA inputs.
Data I/O Control Table
Inputs
Latch
Output
CEAB LEAB OEAB
Status
Buffers
H
X
X
Latched
High Z
X
H
X
Latched
L
L
X
Transparent
X
X
H
High Z
L
X
L
Driving
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
A-to-B data flow shown; B-to-A flow control is the same, except using
CEBA, LEBA and OEBA
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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