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74VCX2245 View Datasheet(PDF) - Fairchild Semiconductor

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74VCX2245 Datasheet PDF : 12 Pages
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June 1999
Revised April 2005
74VCX2245
Low Voltage Bidirectional Transceiver
with 3.6V Tolerant Inputs and Outputs
and 26: Series Resistors in B Outputs
General Description
The VCX2245 contains eight non-inverting bidirectional
buffers with 3-STATE outputs and is intended for bus ori-
ented applications. The T/R input determines the direction
of data flow. The OE input disables both the A and B ports
by placing them in a high impedance state.
The 74VCX2245 is designed for low voltage (1.4V to 3.6V)
VCC applications with I/O compatibility up to 3.6V. The
VCX2245 is also designed with 26: series resistance in
the B Port outputs. This design reduces line noise in appli-
cations such as memory address drivers, clock drivers, and
bus transceivers transmitters
The 74VCX2245 is fabricated with an advanced CMOS
technology to achieve high-speed operation while main-
taining low CMOS power dissipation.
Features
s 1.4V - 3.6V VCC supply operation
s 3.6V tolerant inputs and outputs
s 26: series resistors in B Port outputs
s Power-off high impedance inputs and outputs
s Supports Live Insertion and Withdrawal (Note 1)
s tPD (A to B)
4.4 ns max for 3.0V to 3.6V VCC
s Static Drive (IOH/IOL B outputs):
r12 mA @ 3.0V VCC
s Uses patented Quiet Series¥ noise/EMI reduction
circuitry
s Latchup performance exceeds JEDEC 78 conditions
s ESD performance:
Human body model ! 2000V
Machine model ! 200V
s Leadless DQFN Pb-Free package
Note 1: To ensure the high impedance state during power up and power
down, OEn should be tied to VCC through a pull up resistor. The minimum
value of the resistor is determined by the current sourcing capability of the
driver.
Ordering Code:
Order Number
Package
Number
Package Description
74VCX2245WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74VCX2245BQX
(Note 2)
MLP020B
Pb-Free 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 4.5mm
74VCX2245MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 2: DQFN package available in Tape and Reel only.
Logic Symbol
Pin Descriptions
Quiet Series¥ is a trademark of Fairchild Semiconductor Corporation.
Pin Names
Description
OE
T/R
A0–A7
B0–B7
Output Enable Input (Active LOW)
Transmit/Receive Input
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
© 2005 Fairchild Semiconductor Corporation DS500170
www.fairchildsemi.com
 

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