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74LVT16543MTD View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
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74LVT16543MTD Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
Connection Diagram
Pin Descriptions
Pin
Names
Description
OEABn
OEBAn
CEABn
CEBAn
LEABn
LEBAn
A0–A15
B0–B15
A-to-B Output Enable Input (Active LOW)
B-to-A Output Enable Input (Active LOW)
A-to-B Enable Input (Active LOW)
B-to-A Enable Input (Active LOW)
A-to-B Latch Enable Input (Active LOW)
B-to-A Latch Enable Input (Active LOW)
A-to-B Data Inputs or
B-to-A 3-STATE Outputs
B-to-A Data Inputs or
A-to-B 3-STATE Outputs
Functional Description
The LVT16543 and LVTH16543 contain two sets of D-type
latches, with separate input and output controls for each.
For data flow from A to B, for example, the A to B Enable
(CEAB) input must be LOW in order to enter data from the
A Port or take data from the B Port as indicated in the Data
I/ O Control Table. With CEAB LOW, a low signal on
(LEAB) input makes the A to B latches transparent; a sub-
sequent LOW-to-HIGH transition of the LEAB line puts the
Data I/O Control Table
A latches in the storage mode and their outputs no longer
change with the A inputs. With CEAB and OEAB both
LOW, the B output buffers are active and reflect the data
present on the output of the A latches. Control of data flow
from B to A is similar, but using the CEBA, LEBA and
OEBA. Each byte has separate control inputs, allowing the
device to be used as two 8-bit transceivers or as one 16-bit
transceiver.
CEABn
Inputs
LEABn
OEABn
Latch Status
(Byte n)
H
X
X
Latched
X
H
X
Latched
L
L
X
Transparent
X
X
H
L
X
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
A-to-B data flow shown; B-to-A flow control is the same, except using CEBAn, LEBAn and OEBAn
Output
Buffers
(Byte n)
High Z
High Z
Driving
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