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74LVQ32 View Datasheet(PDF) - STMicroelectronics

Part NameDescriptionManufacturer
74LVQ32 LOW VOLTAGE CMOS QUAD 2-INPUT OR GATE ST-Microelectronics
STMicroelectronics ST-Microelectronics
74LVQ32 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
74LVQ32
LOW VOLTAGE CMOS QUAD 2-INPUT OR GATE
s HIGH SPEED:
tPD = 5.2 ns (TYP.) at VCC = 3.3 V
s COMPATIBLE WITH TTL OUTPUTS
s LOW POWER DISSIPATION:
ICC = 2µA (MAX.) at TA=25°C
s LOW NOISE:
VOLP = 0.3V (TYP.) at VCC = 3.3V
s 75TRANSMISSION LINE DRIVING
CAPABILITY
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 12mA (MIN) at VCC = 3.0V
s PCI BUS LEVELS GUARANTEED AT 24 mA
s BALANCED PROPAGATION DELAYS:
tPLH tPHL
s OPERATING VOLTAGE RANGE:
VCC(OPR) = 2V to 3.6V (1.2V Data Retention)
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 32
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74LVQ32 is a low voltage CMOS QUAD
2-INPUT OR GATE fabricated with sub-micron
silicon gate and double-layer metal wiring C2MOS
SOP
TSSOP
Table 1: Order Codes
PACKAGE
SOP
TSSOP
T&R
74LVQ32MTR
74LVQ32TTR
technology. It is ideal for low power and low noise
3.3V applications.
The internal circuit is composed of 2 stages
including buffer output, which enables high noise
immunity and stable output.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
Figure 1: Pin Connection And IEC Logic Symbols
July 2004
Rev. 5
1/11
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