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MC14512BCPG View Datasheet(PDF) - ON Semiconductor

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Description
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MC14512BCPG
ON-Semiconductor
ON Semiconductor ON-Semiconductor
MC14512BCPG Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
MC14512B
8−Channel Data Selector
The MC14512B is an 8−channel data selector constructed with
MOS P−channel and N−channel enhancement mode devices in a
single monolithic structure. This data selector finds primary
application in signal multiplexing functions. It may also be used for
data routing, digital signal switching, signal gating, and number
sequence generation.
http://onsemi.com
Features
Diode Protection on All Inputs
Single Supply Operation
3−State Output (Logic “1”, Logic “0”, High Impedance)
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low−power TTL Loads or One Low−power
Schottky TTL Load Over the Rated Temperature Range
Pb−Free Packages are Available*
MAXIMUM RATINGS (Voltages Referenced to VSS)
Parameter
Symbol
Value
Unit
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
VDD −0.5 to +18.0 V
Vin, Vout −0.5 to VDD V
+ 0.5
Input or Output Current
(DC or Transient) per Pin
Iin, Iout
± 10
mA
Power Dissipation, Per Package (Note 1) PD
500
mW
Ambient Temperature Range
TA
−55 to +125 °C
Storage Temperature Range
Tstg
−65 to +150 °C
Lead Temperature (8−Second Soldering)
TL
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic “P and D/DW”
Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS v (Vin or Vout) v VDD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD). Unused outputs must be left open.
1
1
MARKING
DIAGRAMS
PDIP−16
P SUFFIX
16
MC14512BCP
AWLYYWWG
CASE 648
1
SOIC−16 16
D SUFFIX
CASE 751B
1
14512BG
AWLYWW
A
WL
YY, Y
WW
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
1
November, 2006 − Rev. 7
Publication Order Number:
MC14512B/D
 

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