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MAX3946_10 View Datasheet(PDF) - Maxim Integrated

Part Name
Description
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MAX3946_10 Datasheet PDF : 28 Pages
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1.0625Gbps to 11.3Gbps, SFP+ Laser Driver
with Laser Impedance Mismatch Tolerance
PIN
18
19, 24
20, 23
21
22
NAME
SCL
VEET
VCC
TIN+
TIN-
EP
Pin Description (continued)
FUNCTION
Serial-Clock Input, CMOS. This pin has 75kI internal pulldown.
Ground
Power-Supply Connections. Provides supply voltage to the core circuitry.
Noninverted Data Input
Inverted Data Input
Exposed Pad. Ground. Must be soldered to circuit board ground for proper thermal and electrical
performance (see the Exposed-Pad Package and Thermal Considerations section).
VCCD
DISABLE
FAULT
BMAX
7.5kI
TX_EN
VCM
50I
TIN+
TIN-
50I
TX_POL
1
EQ
0
EYE SAFETY AND
OUTPUT CONTROL
LASER BIAS
CURRENT LIMITER
POWER-ON RESET
PW
CONTROL
VCCD
CONTROL
LOGIC
75kI
SDA
SCL
CSEL
3-WIRE
INTERFACE
REGISTER
75kI
75kI
SET_TXEQ
SET_PWCTRL
9b DAC SET_IMOD
6b DAC SET_TXDE
9b DAC SET_IBIAS
IMOD_DAC + IDE_DAC
TOUT+
25I
VCCT
25I
TOUT-
IBIAS
BIAS
IBIAS
VCC
100
BMON
MAX3946
Figure 2. Functional Diagram
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