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74VCX162374MTDX-2000 View Datasheet(PDF) - Fairchild Semiconductor

Part NameDescriptionManufacturer
74VCX162374MTDX(2000) Low Voltage 16-Bit D-Type Flip-Flop with 3.6V Tolerant Inputs and Outputs and 26Ω Series Resistors in Outputs Fairchild
Fairchild Semiconductor Fairchild
74VCX162374MTDX Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
January 2000
Revised January 2000
Low Voltage 16-Bit D-Type Flip-Flop
with 3.6V Tolerant Inputs and Outputs
and 26Series Resistors in Outputs
General Description
The VCX162374 contains sixteen non-inverting D-type flip-
flops with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. A buffered clock
(CP) and output enable (OE) are common to each byte and
can be shorted together for full 16-bit operation.
The VCX162374 is also designed with 26series resistors
in the outputs. This design reduces line noise in applica-
tions such as memory address drivers, clock drivers and
bus transceivers/transmitters.
The 74VCX162374 is designed for low voltage (1.65V to
3.6V) VCC applications with I/O compatibility up to 3.6V.
The 74VCX162374 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
s 1.65V–3.6V VCC supply operation
s 3.6V tolerant inputs and outputs
s 26series resistors in outputs
s tPD (CLK to On)
3.4 ns max for 3.0V to 3.6V VCC
4.8 ns max for 2.3V to 2.7V VCC
9.6 ns max for 1.65V to 1.95V VCC
s Power-off high impedance inputs and outputs
s Supports live insertion and withdrawal (Note 1)
s Static Drive (IOH/IOL)
±12 mA @ 3.0V VCC
±8 mA @ 2.3V VCC
±3 mA @ 1.65V VCC
s Uses patented noise/EMI reduction circuitry
s Latch-up performance exceeds 300 mA
s ESD performance:
Human body model > 2000V
Machine model > 200V
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
Ordering Code:
Order Number
Package Descriptions
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names
Output Enable Input (Active LOW)
Clock Pulse Input
© 2000 Fairchild Semiconductor Corporation DS500235
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