Pin No.
1, 12, 16, 27, 29, 32, 34, 45
2
3
4
5
6
7
8
9
10
11
13, 30, 31, 48
14
15, 28, 33, 46
17–26
35–44
47
AD9218
PIN FUNCTION DESCRIPTIONS
Mnemonic
GND
AINA
AINA
DFS/GAIN
REFINA
REFOUT
REFINB
S1
S2
AINB
AINB
VD
ENCB
VDD
D9B–D0B
D0A–D9A
ENCA
Description
Ground
Analog Input for Channel A
Analog Input for Channel A (Complementary)
Data Format Select and Analog Input Gain Mode. (Low = offset binary out-
put available, 1 V p-p supported; high = two’s complement output available,
1 V p-p supported; floating = offset binary output available, 2 V p-p supported;
Set to VREF = two’s complement output available, 2 V p-p supported.)
Reference Voltage Input for Channel A
Internal Reference Voltage
Reference Voltage Input for Channel B
User Select #1 (Refer to Table I)
User Select #2 (Refer to Table I)
Analog Input for Channel B (Complementary)
Analog Input for Channel B
Analog Supply (3 V)
Clock Input for Channel B
Digital Supply (2.5 V to 3.6 V)
Digital Output for Channel B (D9B = MSB)
Digital Output for Channel A (D9A = MSB)
Clock Input for Channel A
PIN CONFIGURATION
48 47 46 45 44 43 42 41 40 39 38 37
GND 1
AINA 2
AINA 3
DFS/GAIN 4
REFINA 5
REFOUT 6
REFINB 7
S1 8
S2 9
AINB 10
AINB 11
GND 12
PIN 1
IDENTIFIER
AD9218
TOP VIEW
(Not to Scale)
13 14 15 16 17 18 19 20 21 22 23 24
36 D1A
35 D0A
34 GND
33 VDD
32 GND
31 VD
30 VD
29 GND
28 VDD
27 GND
26 D0B
25 D1B
REV. 0
–7–