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PIC18F65J50_09 View Datasheet(PDF) - Microchip Technology

Part NameDescriptionManufacturer
PIC18F65J50_09 PIC18F87J50 Family Silicon Errata and Data Sheet Clarification Microchip
Microchip Technology Microchip
PIC18F65J50_09 Datasheet PDF : 16 Pages
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PIC18F87J50 FAMILY
Data Sheet Clarifications
The following typographic corrections and clarifications
are to be noted for the latest version of the device data
sheet (DS39775B):
Note:
Corrections are shown in bold. Where
possible, the original bold text formatting
has been removed for clarity.
1. Module: Table 28-1: Memory
Programming Requirements
On page 430, parameter D132B is renamed, and
the minimum and maximum voltage levels and
conditions column of the Self-Timed Erase or Write
for VDD and VDDCORE for are included. The TWE
parameter number and conditions column are
changed.
The changed content is indicated in bold text in
Table 28-1:
TABLE 28-1: MEMORY PROGRAMMING REQUIREMENTS
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C TA +85°C for industrial
Param
No.
Sym
Characteristic
Min Typ† Max Units
Conditions
Program Flash Memory
D130 EP Cell Endurance
10K
— E/W -40°C to +85°C
D131 VPR VDDCORE for Read
VMIN
3.6
V VMIN = Minimum operating
voltage
D132 VPEW Voltage for Self-Timed Erase or
Write
VDD
2.35
VDDCORE
2.25
3.6
V ENVREG tied to VDD
2.7
V ENVREG tied to VSS
D133A TIW Self-Timed Write Cycle Time
2.8
ms
D133B TIE
Self-Timed Page Erase Cycle
Time
33.0
ms
D134 TRETD Characteristic Retention
20
— Year Provided no other
specifications are violated
D135 IDDP Supply Current during
Programming
10
— mA
D140 TWE Writes per Erase Cycle
1
For each physical address
† Data in “Typ” column is at 3.3V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
© 2009 Microchip Technology Inc.
DS80481A-page 5
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