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74LVQ138SC(1998) View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
View to exact match
74LVQ138SC
(Rev.:1998)
Fairchild
Fairchild Semiconductor Fairchild
74LVQ138SC Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
Functional Description
The LVQ138 high-speed 1-of-8 decoder/demultiplexer ac-
cepts three binary weighted inputs (A0, A1, A2) and, when
enabled, provides eight mutually exclusive active-LOW out-
puts (O0–O7). The LVQ138 features three Enable inputs, two
active-LOW (E1, E2) and one active-HIGH (E3). All outputs
will be HIGH unless E1 and E2 are LOW and E3 is HIGH.
This multiple enable function allows easy parallel expansion
Truth Table
Inputs
E1
E2
E3
A0
A1
A2
O0
HXXXXXH
XHXXXXH
X
X
L
X
X
X
H
of the device to a 1-of-32 (5 lines to 32 lines) decoder with
just four LVQ138 devices and one inverter (see Figure 1).
The LVQ138 can be used as an 8-output demultiplexer by
using one of the active LOW Enable inputs as the data input
and the other Enable inputs as strobes. The Enable inputs
which are not used must be permanently tied to their appro-
priate active-HIGH or active-LOW state.
Outputs
O1 O2 O3 O4 O5 O6 O7
HHHHHHH
HHHHHHH
HHHHHHH
L
L
H
L
L
L
L
HHHHHHH
L
L
H
H
L
L
H
L
H
H
H
H
H
H
L
L
H
L
H
L
H
H
L
H
H
H
H
H
L
L
H
H
H
L
H
H
H
L
H
H
H
H
L
L
H
L
L
HHHHH
L
HHH
L
L
H
H
L
H
H
H
H
H
H
L
H
H
L
L
H
L
H
H
H
H
H
H
H
H
L
H
L
L
H
H
H
H
H
H
H
H
H
H
H
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Logic Diagram
DS011350-5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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