datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

SI4831-B30 View Datasheet(PDF) - Silicon Laboratories

Part Name
Description
View to exact match
SI4831-B30 Datasheet PDF : 20 Pages
First Prev 11 12 13 14 15 16 17 18 19 20
Si4831/35-B30
9. PCB Land Pattern: Si4831/35-B30
Figure 4, “PCB Land Pattern,” illustrates the PCB land pattern details for the Si4831/35-B30-GU SSOP. Table 10
lists the values for the dimensions shown in the illustration.
Figure 4. PCB Land Pattern
Table 10. PCB Land Pattern Dimensions
Dimension
Min
Max
C
5.20
5.40
E
0.65 BSC
X1
0.35
0.45
Y1
1.55
1.75
General:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This land pattern design is based on the IPC-7351 guidelines.
Solder Mask Design:
3. All metal pads are to be non-solder mask defined (NSMD). Clearance between the
solder mask and the metal pad is to be 60 µm minimum, all the way around the pad.
Stencil Design:
4. A stainless steel, laser-cut, and electro-polished stencil with trapezoidal walls
should be used to assure good solder paste release.
5. The stencil thickness should be 0.125 mm (5 mils).
6. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads.
Card Assembly:
7. A No-Clean, Type-3 solder paste is recommended.
8. The recommended card reflow profile is per the JEDEC/IPC J-STD-020
specification for Small Body Components.
16
Rev. 1.0
 

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]