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T-8208-BAL-DB View Datasheet(PDF) - Agere -> LSI Corporation

Part NameDescriptionManufacturer
T-8208-BAL-DB CelXpres™ ATM Interconnect Agere
Agere -> LSI Corporation Agere
T-8208-BAL-DB Datasheet PDF : 214 Pages
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CelXpres T8208
ATM Interconnect
Advance Data Sheet
September 2001
List of Tables (continued)
Table
Page
Table 51. Control Cell Receive Direct Memory (CCRXDM) (5Ch to 93h) ................................................................102
Table 52. Control Cell Transmit Direct Memory (CCTXDM) (A0h to D7h) ...............................................................102
Table 53. PHY Port 0 and Control Cells Multicast Direct Memory (PP0MDM) (E0h to FFh) ...................................103
Table 54. Main Configuration 1 (MCF1) (0100h) ......................................................................................................104
Table 55. Main Interrupt Status 1 (MIS1) (0102h) ...................................................................................................105
Table 56. Main Interrupt Enable 1 (MIE1) (0104h) ..................................................................................................106
Table 57. TX UTOPIA Clock Configuration (TXUCCF) (010Ch) ..............................................................................107
Table 58. RX UTOPIA Clock Configuration (RXUCCF) (010Eh) .............................................................................108
Table 59. Main Configuration/Control (MCFCT) (0110h) .........................................................................................109
Table 60. Main Configuration 2 (MCF2) (0112h) ......................................................................................................110
Table 61. UTOPIA Configuration (UCF) (0114h) ....................................................................................................113
Table 62. Main Configuration 3 (MCF3) (0116h) .....................................................................................................113
Table 63. UTOPIA Configuration 5 (UCF5) (0118h) ...............................................................................................114
Table 64. UTOPIA Configuration 4 (UCF4) (011Ah) ...............................................................................................114
Table 65. UTOPIA Configuration 3 (UCF3) (011Ch) ...............................................................................................114
Table 66. UTOPIA Configuration 2 (UCF2) (011Eh) ...............................................................................................114
Table 67. Extended LUT Control (ELUTCN) (0120h) ..............................................................................................115
Table 68. Generated Cell Bus Clocks Control Register (GCBCCR) (0122h) ...........................................................116
Table 69. RX PHY FIFO Thresholds to Change Cell Bus Request Priority (RXPFTCRP) (0126h) ........................118
Table 70. Enable Request on Upper Backplane Address (ERUB) (012Ch) ............................................................119
Table 71. Enable Request on Lower Backplane Address (ERLB) (012Ch) ............................................................ 119
Table 72. Cell Bus Configuration/Status (CBCFS) (0130h) ....................................................................................120
Table 73. Main Interrupt Status 2 (MIS2) (0132h) ....................................................................................................121
Table 74. Main Interrupt Enable 2 (MIE2) (0134h) ...................................................................................................122
Table 75. Loopback (LB) (0136h) ...........................................................................................................................122
Table 76. Extended LUT Configuration (ELUTCF) (0138h) ....................................................................................122
Table 77. Misrouted Cell LUT 3 (MLUT3) (013Ch) ................................................................................................. 123
Table 78. Misrouted Cell LUT 2 (MLUT2) (013Eh) .................................................................................................. 123
Table 79. Misrouted Cell LUT 1 (MLUT1) (0140h) ..................................................................................................123
Table 80. Misrouted Cell LUT 0 (MLUT0) (0142h) ..................................................................................................123
Table 81. Misrouted Cell LUT 4 (MLUT4) (0144h) ..................................................................................................124
Table 82. Misrouted Cell Header High (MCHH) (0146h) ......................................................................................... 124
Table 83. Misrouted Cell Header Low (MCHL) (0148h) .......................................................................................... 124
Table 84. HEC Interrupt Status 3 (HIS3) (0300h) .................................................................................................. 125
Table 85. HEC Interrupt Status 2 (HIS2) (0302h) ................................................................................................... 125
Table 86. HEC Interrupt Status 1 (HIS1) (0304h) ..................................................................................................125
Table 87. HEC Interrupt Status 0 (HIS0) (0306h) ..................................................................................................125
Table 88. HEC Interrupt Enable 3 (HIE3) (0308h) ..................................................................................................126
Table 89. HEC Interrupt Enable 2 (HIE2) (030Ah) ..................................................................................................126
Table 90. HEC Interrupt Enable 1 (HIE1) (030Ch) .................................................................................................126
Table 91. HEC Interrupt Enable 0 (HIE0) (030Eh) ..................................................................................................126
Table 92. LUT Interrupt Service Request 3 (LUTISR3) (0310h) .............................................................................127
Table 93. LUT Interrupt Service Request 2 (LUTISR2) (0312h) .............................................................................127
Table 94. LUT Interrupt Service Request 1 (LUTISR1) (0314Ch) ...........................................................................127
Table 95. LUT Interrupt Service Request 0 (LUTISR0) (0316h) .............................................................................127
Table 96. LUT X Configuration/Status (LUTXCFS) (0320h to 039Eh) ....................................................................128
Table 97. Master Queue 7 (MQ7) (0150h) ............................................................................................................... 130
Table 98. Master Queue 6 (MQ6) (0152h) ............................................................................................................... 130
Table 99. Master Queue 5 (MQ5) (0154h) ............................................................................................................... 130
Table 100. Master Queue 4 (MQ4) (0156h) .............................................................................................................131
Table 101. Master Queue 3 (MQ3) (0158h) .............................................................................................................131
Table 102. Master Queue 2 (MQ2) (015Ah) .............................................................................................................131
6
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