T-8208-BAL-DB View Datasheet(PDF) - Agere -> LSI Corporation
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Description
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T-8208-BAL-DB Datasheet PDF : 214 Pages
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CelXpres T8208
ATM Interconnect
Advance Data Sheet
September 2001
Table of Contents
Contents
Page
1 Product Overview................................................................................................................................................1
1.1 Features ....................................................................................................................................................1
1.2 Applications ...............................................................................................................................................1
1.3 Description ................................................................................................................................................9
1.4 Conventions ............................................................................................................................................12
1.5 Glossary ..................................................................................................................................................13
2 Pinout ................................................................................................................................................................14
3 Powerup/Reset Sequence ................................................................................................................................22
4 Hot Insertion......................................................................................................................................................23
5 PLL Configuration .............................................................................................................................................24
6 Microprocessor Interface ..................................................................................................................................25
6.1 Microprocessor Interface Configuration ..................................................................................................25
6.2 Microprocessor Interrupts........................................................................................................................25
6.3 Accessing the CelXpres T8208 via Microprocessor Interface.................................................................25
6.3.1 Accessing the Extended Memory Registers...............................................................................26
6.3.1.1 Extended Memory Writes.............................................................................................26
6.3.1.2 Extended Memory Reads.............................................................................................26
6.3.2 CelXpres T8208 Access Performance .......................................................................................27
7 General-Purpose I/O (GPIO) ............................................................................................................................28
8 Look-Up Table ..................................................................................................................................................29
8.1 Look-Up Table RAM................................................................................................................................29
8.2 Organization ............................................................................................................................................30
8.3 Look-Up Procedure .................................................................................................................................35
8.4 Extended Records...................................................................................................................................38
8.5 Diagnostics..............................................................................................................................................42
8.6 Setup .......................................................................................................................................................42
8.7 LUT Bypass.............................................................................................................................................42
9 UTOPIA Interface..............................................................................................................................................43
9.1 Incoming UTOPIA Cell Interface .............................................................................................................44
9.1.1 Incoming PHY Mode (Cells Received by T8208) .......................................................................44
9.1.2 Incoming ATM Mode (Cells Received by T8208).......................................................................44
9.2 Outgoing UTOPIA Cell Interface .............................................................................................................45
9.2.1 Outgoing PHY Mode (Cells Sent by T8208)...............................................................................45
9.2.2 Outgoing ATM Mode (Cells Sent by T8208) ..............................................................................46
9.3 Counters..................................................................................................................................................48
9.3.1 Dropped Cell Counters...............................................................................................................49
9.4 55-Byte UTOPIA Mode............................................................................................................................49
9.5 Shared UTOPIA Mode ............................................................................................................................50
9.6 UTOPIA Pin Modes .................................................................................................................................52
9.6.1 UTOPIA Pin Modes for 8-Bit UTOPIA Operation .......................................................................52
9.6.2 UTOPIA Pin Modes for 16-Bit UTOPIA Operation .....................................................................56
9.7 UTOPIA Clocking ....................................................................................................................................58
9.8 Option for Counters to Clear on Read.....................................................................................................58
10 Cell Bus Interface..............................................................................................................................................59
10.1 General Architecture ...............................................................................................................................59
10.2 Cell Bus Frames......................................................................................................................................61
10.3 Cell Bus Routing Headers .......................................................................................................................64
10.3.1 Control Cells...............................................................................................................................65
10.3.2 Data Cells...................................................................................................................................65
10.3.3 Loopback Cells...........................................................................................................................66
10.3.4 Multicast Routing........................................................................................................................66
10.3.5 Broadcast Routing......................................................................................................................67
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Agere Systems Inc.
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