datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

T-8208-BAL-DB View Datasheet(PDF) - Agere -> LSI Corporation

Part Name
Description
View to exact match
T-8208-BAL-DB
Agere
Agere -> LSI Corporation Agere
T-8208-BAL-DB Datasheet PDF : 214 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
Advance Data Sheet
September 2001
CelXpres T8208
ATM Interconnect
1 Product Overview (continued)
Figure 2 illustrates the use of the CelXpres T8208 in a system with dual backplane cell buses using shared UTO-
PIA mode. In this configuration, both T8208 devices on each card receive cells from the UTOPIA bus, and each
device uses its translation table to determine if the cell should be transmitted on its backplane cell bus. In the
egress direction, each T8208 device receives cells from its cell bus to transmit on the UTOPIA bus. MPHY arbitra-
tion and queue priorities are resolved using a six-wire interface between the two devices. Although a single ATM
virtual connection is not typically established on both backplane cell buses simultaneously, no restrictions exist for
a single PHY utilizing both backplane cell buses for different virtual connections supporting higher throughput from
two bus interfaces. Redundant bus configurations can be supported in the event of a bus failure with T8208
devices by configuring one device to assume bus responsibility from the other.
DOWNSTREAM
UPSTREAM
BUFFERING
TRANSLATION
T8208
UTOPIA
T8208
UTOPIA
PHYs
DOWNSTREAM
UPSTREAM
BUFFERING
TRANSLATION
BACKPLANE
BUS
DOWNSTREAM
UPSTREAM
BUFFERING
TRANSLATION
T8208
UTOPIA
T8208
DOWNSTREAM
UPSTREAM
BUFFERING
TRANSLATION
UTOPIA
PHYs
Figure 2. Dual Bus Implementation
0041b
Agere Systems Inc.
11
 

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]