LC72131 View Datasheet(PDF) - SANYO -> Panasonic

Part Name

Description

View to exact match

LC72131

AM/FM PLL Frequency Synthesizer

SANYO -> Panasonic 

2. IF Counter Operation

LC72131, 72131M

Before starting the IF count, the IF counter must be reset in advance by setting CTE in the serial data to 0.

The IF count is started by changing the CTE bit in the serial data from 0 to 1. The serial data is latched by the

LC72131 when the CE pin is dropped from high to low. The IF signal must be supplied to the IFIN pin in the period

between the point the CE pin goes low and the end of the wait time at the latest. Next, the value of the IF counter at

the end of the measurement period must be read out during the period that CTE is 1. This is because the IF counter is

reset when CTE is set to 0.

Note: When operating the IF counter, the control microprocessor must first check the state of the IF-IC SD (station

detect) signal and only after determining that the SD signal is present turn on IF buffer output and execute an

IF count operation. Autosearch techniques that use only the IF counter are not recommended, since it is

possible for IF buffer leakage output to cause incorrect stops at points where there is no station.

IFIN minimum input sensitivity standard

IFS

0.4 ≤ f < 0.5

0.5 ≤ f < 8

f (MHz)

8 ≤ f ≤ 12

1: Normal mode

40 mVrms

(0.1 to 3 mVrms)

40 mVrms

40 mVrms

(1 to 10 mVrms)

70 mVrms

0: Degradation mode (10 to 15 mVrms)

70 mVrms

70 mVrms

(30 to 40 mVrms)

Note: Values in parentheses are actual performance values presented as reference data.

No. 4921-17/23

Share Link: