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LC72131 View Datasheet(PDF) - SANYO -> Panasonic

Part NameDescriptionManufacturer
LC72131 AM/FM PLL Frequency Synthesizer SANYO
SANYO -> Panasonic SANYO
LC72131 Datasheet PDF : 23 Pages
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LC72131, 72131M
2. DI Control Data Functions
No.
Control block/data
Functions
Programmable divider data • Data that sets the divisor of the programmable divider.
P0 to P15
A binary value in which P15 is the MSB. The LSB changes depending on
DVS and SNS. (*: don’t care)
(1)
DVS, SNS
Reference divider data
R0 to R3
(2)
XS
IF counter control data
CTE
GT0, GT1
DVS SNS LSB
Divisor setting (N)
Actual divisor
1
*
P0
272 to 65535
Twice the value of the setting
0
1
P0
272 to 65535
The value of the setting
0
0
P4
4 to 4095
The value of the setting
Note: P0 to P3 are ignored when P4 is the LSB.
• Selects the signal input pin (AMIN or FMIN) for the programmable divider, switches
the input frequency range. (*: don’t care)
DVS SNS
Input pin
Input frequency range
1
*
FMIN
10 to 160 MHz
0
1
AMIN
2 to 40 MHz
0
0
AMIN
0.5 to 10 MHz
Note: See the “Programmable Divider Structure” item for more information.
• Reference frequency (fref) selection data.
R3
R2
R1
R0
Reference frequency (kHz)
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
100
50
25
25
12.5
6.25
3.125
3.125
1
0
0
0
10
1
0
0
1
9
1
0
1
0
5
1
0
1
1
1
1
1
0
0
3
1
1
0
1
15
1
1
1
0
PLL INHIBIT + Xtal OSC STOP
1
1
1
1
PLL INHIBIT
Note: PLL INHIBIT
The programmable divider block and the IF counter block are stopped, the FMIN,
AMIN, and IFIN pins are set to the pull-down state (ground), and the charge pump
goes to the high impedance state.
• Crystal resonator selection
XS = 0: 4.5 MHz
XS = 1: 7.2 MHz
The 7.2 MHz frequency is selected after the power-on reset.
• IF counter measurement start data
CTE = 1: Counter start
CTE = 0: Counter reset
• Determines the IF counter measurement period.
GT1
GT0
Measurement time (ms)
Wait time (ms)
(3)
0
0
4
3 to 4
0
1
8
3 to 4
1
0
32
7 to 8
1
1
64
Note: See the “IF Counter Structure” item for more information.
7 to 8
I/O port specification data • Specifies the I/O direction for the bidirectional pins IO1 and IO2.
(4) IOC1, IOC2
Data: 0 = input mode, 1 = output mode
Output port data
(5) BO1 to BO4, IO1, IO2
• Data that determines the output from the BO1 to BO4, IO1 and IO2 output ports
Data: 0 = open, 1 = low
• The data = 0 (open) state is selected after the power-on reset.
Related data
IFS
IOC1
IOC2
Continued on next page.
No. 4921-10/23
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