|NE1617ADS,112||Temperature monitor for microprocessor systems|
|NE1617ADS,112 Datasheet PDF : 30 Pages |
Temperature monitor for microprocessor systems
the Alert Response byte from the Alert Response Address, which is a special slave
address to the SMBus. The ALERT output cannot be reset by reading the device status
The device was designed to accommodate the Alert interrupt detection capability of the
SMBus.1 Basically, the SMBus provides Alert response interrupt pointers in order to
identify the slave device which has caused the Alert interrupt. The 7-bit Alert response
slave address is 0001 100 and the Alert response byte reflects the slave address of the
device which has caused Alert interrupt. Bit assignments of the Alert response byte are
listed in Table 9. The ALERT output will be reset to HIGH state upon reading the Alert
response slave address unless the fault condition persists.
Alert response (Alert response address 0001 100) bit description
indicate address B6 of alerted device
indicate address B5 of alerted device
indicate address B4 of alerted device
indicate address B3 of alerted device
indicate address B2 of alerted device
indicate address B1 of alerted device
indicate address B0 of alerted device
8.4 Power-up default condition
Upon power-up reset (power is switched off-on), the NE1617A goes into this default
• Interrupt latch is cleared, the ALERT output is pulled HIGH by the external pull-up
• The auto-conversion rate is at 0.25 Hz; conversion rate data is 02h.
• Temperature limits for both channels are +127 C for high limit, and 55 C for low
• Command pointer register is set to ‘00’ for quickly reading the RIT.
8.5 Fault detection
The NE1617A has a fault detector to the diode connection. The connection is checked
when a conversion is initiated and the proper flags are set if the fault condition has
Table 10. Fault detection
D+ and D
RET data storage
Status set flag
B2 and B4
1. The NE1617A implements the collision arbitration function per System Management Bus Specification Revision 1.1, dated
December 11, 1998, which conforms to standard I2C-bus arbitration as described in NXP document UM10204, “I2C-bus
specification and user manual”.
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 20 March 2012
© NXP B.V. 2012. All rights reserved.
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