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KSZ8765CLXIC View Datasheet(PDF) - Micrel

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KSZ8765CLXIC Datasheet PDF : 153 Pages
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Micrel, Inc.
KSZ8765CLX
Uses a single 50MHz clock reference (provided internally or externally). In internal mode, the chip provides a
reference clock from the RXC5 to the opposite clock input pin for RMII interface. In external mode, the chip receives
50MHz reference clock from an external oscillator or opposite RMII interface.
Provides independent 2-bit wide (bi-bit) transmit and receive data paths.
Port 5 GMAC5 SW5-MII Interface
The table below shows two connection methods. The first is an external MAC connecting in SW5-MII PHY mode. The
second is an external PHY connecting in SW5-MII MAC mode. The MAC mode or PHY mode setting is determined by the
strap Pin 62 LED2_1.
Table 7. Port 5 SW5-MII Connection
MAC-to-MAC Connection
KSZ8765CLX MAC5 SW5-MII PHY Mode
External
MAC
SW5-MII
Signals
Type
MTXEN
TXEN5
Input
MTXER
TXER5
Input
MTXD[3:0]
TXD5[3:0]
Input
MTXC
TXC5
Output
MCOL
COL5
Output
MCRS
CRS5
Output
MRXDV
RXDV5
Output
MRXER
RXER5
Output
MRXD[3:0]
RXD5[3:0]
Output
MRXC
RXC5
Output
Description
Transmit Enable
Transmit Error
Transmit Data
Bit[3:0]
Transmit Clock
Collision
Detection
Carrier Sense
Receive Data
Valid
Receive Error
Receive Data
Bit[3:0]
Receive Clock
MAC-to-PHY Connection
KSZ8765CLX MAC5 SW5-MII MAC Mode
External
PHY
SW5-MII
Signals
Type
MTXEN
RXDV5
Output
MTXER
RXER5
Output
MTXD[3:0]
RXD5[3:0]
Output
MTXC
RXC5
Input
MCOL
COL5
Input
MCRS
CRS5
Input
MRXDV
TXEN5
Input
MRXER
TXER5
Input
MRXD[3:0]
TXD5[3:0]
Input
MRXC
TXC5
Input
The MII interface operates in either MAC mode or PHY mode. These interfaces are nibble-wide data interfaces, so they
run at one-quarter the network bit rate (not encoded). Additional signals on the transmit side indicate when data is valid or
when an error occurs during transmission. Likewise, the receive side has indicators that convey when the data is valid and
without physical layer errors. For half-duplex operation, there is a COL signal that indicates a collision has occurred during
transmission.
Note: Normally MRXER would indicate a receive error coming from the physical layer device. MTXER would indicate a
transmit error from the MAC device. These signals are not appropriate for this configuration. For PHY mode operation with
an external MAC, if the device interfacing with the KSZ8765CLX has an MRXER pin, it can be tied low. For MAC mode
operation with an external PHY, if the device interfacing with the KSZ8765CLX has an MTXER pin, it can be tied low.
July 23, 2014
40
Revision 1.0
 

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