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MC14584B View Datasheet(PDF) - ON Semiconductor

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MC14584B
ON-Semiconductor
ON Semiconductor ON-Semiconductor
MC14584B Datasheet PDF : 0 Pages
MC14584B
Hex Schmitt Trigger
The MC14584B Hex Schmitt Trigger is constructed with MOS
Pchannel and Nchannel enhancement mode devices in a single
monolithic structure. These devices find primary use where low power
dissipation and/or high noise immunity is desired. The MC14584B
may be used in place of the MC14069UB hex inverter for enhanced
noise immunity to “square up” slowly changing waveforms.
Features
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Lowpower TTL Loads or One Lowpower
Schottky TTL Load over the Rated Temperature Range
Double Diode Protection on All Inputs
Can Be Used to Replace MC14069UB
For Greater Hysteresis, Use MC14106B which is PinforPin
Replacement for CD40106B and MM74Cl4
These Devices are PbFree and are RoHS Compliant
MAXIMUM RATINGS (Voltages Referenced to VSS)
Symbol
Parameter
Value
Unit
VDD
Vin, Vout
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
0.5 to +18.0
V
0.5 to VDD + 0.5
V
Iin, Iout
Input or Output Current
(DC or Transient) per Pin
± 10
mA
PD
Power Dissipation, per Package
(Note 1)
500
mW
TA
Ambient Temperature Range
55 to +125
°C
Tstg
Storage Temperature Range
65 to +150
°C
TL
Lead Temperature
(8Second Soldering)
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
highimpedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS v (Vin or Vout) v VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either VSS or VDD). Unused outputs must be left open.
http://onsemi.com
PDIP14
P SUFFIX
CASE 646
MARKING
DIAGRAMS
14
MC14584BCP
AWLYYWWG
1
14
SOIC14
D SUFFIX
CASE 751A
14584BG
AWLYWW
1
TSSOP14
DT SUFFIX
CASE 948G
14
14
584B
ALYWG
G
1
SOEIAJ14
F SUFFIX
CASE 965
14
MC14584B
ALYWG
1
A
WL, L
YY, Y
WW, W
G or G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= PbFree Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
1
June, 2011 Rev. 8
Publication Order Number:
MC14584B/D
 

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