M29FXXXFT/B View Datasheet(PDF) - Micron Technology

Part Name

Description

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M29FXXXFT/B

Micron Parallel NOR Flash Embedded Memory

Micron Technology 

M29FxxxFT/B

General Description

General Description

This description applies specifically to the M29F 16Mb (2 Meg x 8 or 1 Meg x 16) nonvo-

latile memory device, but also applies to lower densities. The device enables READ,

ERASE, and PROGRAM operations using a single, low-voltage (4.5–5.5V) supply. On

power-up, the device defaults to read mode and can be read in the same way as a ROM

or EPROM.

The device is divided into blocks that can be erased independently, preserving valid da-

ta while old data is erased. Each block can be protected independently to prevent acci-

dental PROGRAM or ERASE operations from modifying the memory. PROGRAM and

ERASE commands are written to the command interface. An on-chip program/erase

controller simplifies the process of programming or erasing the device by managing the

operations required to update the memory contents.

The end of a PROGRAM or ERASE operation can be detected and any error conditions

identified. The command set required to control the memory is consistent with JEDEC

standards.

The blocks are asymmetrically arranged. The first or last 64KB have been divided into

four additional blocks. The 16KB boot block can be used for small initialization code to

start the microprocessor. The two 8KB parameter blocks can be used for parameter

storage. The remaining 32KB is a small main block where the application may be stored.

CE#, OE#, and WE# control the bus operation of the memory. They enable simple con-

nection to most microprocessors, often without additional logic. Devices are offered in

48-pin TSOP (12mm x 20mm) and 44-pin small-outline packages. The device is sup-

plied with all the bits erased (set to 1).

Figure 1: Logic Diagram

VCC

20

A[19:0]

WE#

CE#

OE#

RST#

BYTE#

15

DQ[7:0]

DQ[14:8]

DQ15/A–1

RY/BY#

PDF: 09005aef845656da

m29fxxxf/t_2mb-16mb.pdf - Rev. B 2/14 EN

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