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W25Q32FWTBIQ View Datasheet(PDF) - Winbond

Part NameW25Q32FWTBIQ Winbond
Winbond Winbond
Description1.8V 32M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI
W25Q32FWTBIQ Datasheet PDF : 94 Pages
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W25Q32FW
8.2.15 Sector Erase (20h)
The Sector Erase instruction sets all memory within a specified sector (4K-bytes) to the erased state of all
1s (FFh). A Write Enable instruction must be executed before the device will accept the Sector Erase
Instruction (Status Register bit WEL must equal 1). The instruction is initiated by driving the /CS pin low
and shifting the instruction code “20h” followed a 24-bit sector address (A23-A0). The Sector Erase
instruction sequence is shown in Figure 31a & 31b.
The /CS pin must be driven high after the eighth bit of the last byte has been latched. If this is not done the
Sector Erase instruction will not be executed. After /CS is driven high, the self-timed Sector Erase instruction
will commence for a time duration of tSE (See AC Characteristics). While the Sector Erase cycle is in
progress, the Read Status Register instruction may still be accessed for checking the status of the BUSY
bit. The BUSY bit is a 1 during the Sector Erase cycle and becomes a 0 when the cycle is finished and the
device is ready to accept other instructions again. After the Sector Erase cycle has finished the Write Enable
Latch (WEL) bit in the Status Register is cleared to 0. The Sector Erase instruction will not be executed if
the addressed page is protected by the Block Protect (CMP, SEC, TB, BP2, BP1, and BP0) bits or the
Individual Block/Sector Locks.
/CS
CLK
DI
(IO0)
DO
(IO1)
Mode 3
0
Mode 0
* = MSB
123456789
29 30 31
Instruction (20h)
24-Bit Address
23 22
*
High Impedance
210
Mode 3
Mode 0
Figure 31a. Sector Erase Instruction (SPI Mode)
/CS
CLK
IO0
Mode 3
Mode 0
01234567
Instruction
20h
A23-16
20 16
A15-8
12 8
A7-0
40
Mode 3
Mode 0
IO1
21 17 13 9 5 1
IO2
22 18 14 10 6 2
IO3
23 19 15 11 7 3
Figure 31b. Sector Erase Instruction (QPI Mode)
- 46 -
Publication Release Date: July 01, 2016
- Revision H
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GENERAL DESCRIPTIONS
The W25Q32FW (32M-bit) Serial Flash memory provides a storage solution for systems with limited space, pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial Flash devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing voice, text and data. The device operates on a single 1.65V to 1.95V power supply with current consumption as low as 4mA active and 1µA for power-down. All devices are offered in space-saving packages.
The W25Q32FW array is organized into 32,768 programmable pages of 256-bytes each. Up to 256 bytes can be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of 128 (32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The W25Q32FW has 1,024 erasable sectors and 64 erasable blocks respectively. The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage. (See Figure 2.)

FEATURES
● New Family of SpiFlash Memories
   – W25Q32FW: 32M-bit / 4M-byte
   – Standard SPI: CLK, /CS, DI, DO, /WP, /Hold
   – Dual SPI: CLK, /CS, IO0, IO1, /WP, /Hold
   – Quad SPI: CLK, /CS, IO0, IO1, IO2, IO3
   – QPI: CLK, /CS, IO0, IO1, IO2, IO3
   – Software & Hardware Reset
● Highest Performance Serial Flash
   – 104MHz Single, Dual/Quad SPI clocks
   – 208/416MHz equivalent Dual/Quad SPI
   – 50MB/S continuous data transfer rate
   – Min 100K Program-Erase cycles per secto
   – More than 20-year data retention
● Efficient “Continuous Read” and QPI Mode
   – Continuous Read with 8/16/32/64-Byte Wrap
   – As few as 8 clocks to address memory
   – Quad Peripheral Interface (QPI) reduces instruction overhead
   – Allows true XIP (execute in place) operation
   – Outperforms X16 Parallel Flash
● Flexible Architecture with 4KB sectors
   – Uniform Sector/Block Erase (4K/32K/64K-Byte)
   – Program 1 to 256 byte per programmable page
   – Erase/Program Suspend & Resume
● Advanced Security Features
   – Software and Hardware Write-Protect
   – Power Supply Lock-Down and OTP protection
   – Top/Bottom, Complement array protection
   – Individual Block/Sector array protection
   – 64-Bit Unique ID for each device
   – Discoverable Parameters (SFDP) Register
   – 3X256-Bytes Security Registers with OTP locks
   – Volatile & Non-volatile Status Register Bits
● Space Efficient Packaging
   – 8-pin SOIC/VSOP 208-mil, XSON 4x4-mm
   – 8-pad WSON 6x5-mm / 8x6-mm
   – 16-pin SOIC 300-mil (additional /RESET)
   – 24-ball TFBGA 8x6-mm(additional /RESET)
   – 12-ball WLCSP
   – Contact Winbond for KGD and other options

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